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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 00:30:08 -0400
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 00:30:08 -0400
commitd95fb13c960ae19e9fd4a95807eb68fa20caf537 (patch)
tree73fda6890849396586afad1590a40e2adcfd7247 /include
parent3530570fd43632b60b00e5ea17519d2bd69d1434 (diff)
sh: Fixup TMU_TOCR definition for SH7300.
SH7300 has a different TMU_TOCR, make the TMU code work again. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
-rw-r--r--include/asm-sh/cpu-sh3/timer.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h
index 3d8e95e8d10c..2082ad956f21 100644
--- a/include/asm-sh/cpu-sh3/timer.h
+++ b/include/asm-sh/cpu-sh3/timer.h
@@ -23,6 +23,10 @@
23 * --------------------------------------------------------------------------- 23 * ---------------------------------------------------------------------------
24 */ 24 */
25 25
26#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
27#define TMU_TOCR 0xfffffe90 /* Byte access */
28#endif
29
26#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) 30#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
27#define TMU_TSTR 0xa412fe92 /* Byte access */ 31#define TMU_TSTR 0xa412fe92 /* Byte access */
28 32
@@ -39,9 +43,6 @@
39#define TMU2_TCR 0xa412feb4 /* Word access */ 43#define TMU2_TCR 0xa412feb4 /* Word access */
40 44
41#else 45#else
42#if !defined(CONFIG_CPU_SUBTYPE_SH7727)
43#define TMU_TOCR 0xfffffe90 /* Byte access */
44#endif
45#define TMU_TSTR 0xfffffe92 /* Byte access */ 46#define TMU_TSTR 0xfffffe92 /* Byte access */
46 47
47#define TMU0_TCOR 0xfffffe94 /* Long access */ 48#define TMU0_TCOR 0xfffffe94 /* Long access */