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authorDavid Howells <dhowells@redhat.com>2008-09-24 12:48:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-09-24 19:38:17 -0400
commitb4f151ff899362fec952c45d166252c9912c041f (patch)
tree7c4453472c21c7d3368b19a504c6841606f36c60 /include
parent7a528159b93bc52c14aedff55d53e741227fc846 (diff)
MN10300: Move asm-arm/cnt32_to_63.h to include/linux/
Move asm-arm/cnt32_to_63.h to include/linux/ so that MN10300 can make use of it too. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/cnt32_to_63.h80
1 files changed, 80 insertions, 0 deletions
diff --git a/include/linux/cnt32_to_63.h b/include/linux/cnt32_to_63.h
new file mode 100644
index 000000000000..8c0f9505b48c
--- /dev/null
+++ b/include/linux/cnt32_to_63.h
@@ -0,0 +1,80 @@
1/*
2 * Extend a 32-bit counter to 63 bits
3 *
4 * Author: Nicolas Pitre
5 * Created: December 3, 2006
6 * Copyright: MontaVista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation.
11 */
12
13#ifndef __LINUX_CNT32_TO_63_H__
14#define __LINUX_CNT32_TO_63_H__
15
16#include <linux/compiler.h>
17#include <linux/types.h>
18#include <asm/byteorder.h>
19
20/* this is used only to give gcc a clue about good code generation */
21union cnt32_to_63 {
22 struct {
23#if defined(__LITTLE_ENDIAN)
24 u32 lo, hi;
25#elif defined(__BIG_ENDIAN)
26 u32 hi, lo;
27#endif
28 };
29 u64 val;
30};
31
32
33/**
34 * cnt32_to_63 - Expand a 32-bit counter to a 63-bit counter
35 * @cnt_lo: The low part of the counter
36 *
37 * Many hardware clock counters are only 32 bits wide and therefore have
38 * a relatively short period making wrap-arounds rather frequent. This
39 * is a problem when implementing sched_clock() for example, where a 64-bit
40 * non-wrapping monotonic value is expected to be returned.
41 *
42 * To overcome that limitation, let's extend a 32-bit counter to 63 bits
43 * in a completely lock free fashion. Bits 0 to 31 of the clock are provided
44 * by the hardware while bits 32 to 62 are stored in memory. The top bit in
45 * memory is used to synchronize with the hardware clock half-period. When
46 * the top bit of both counters (hardware and in memory) differ then the
47 * memory is updated with a new value, incrementing it when the hardware
48 * counter wraps around.
49 *
50 * Because a word store in memory is atomic then the incremented value will
51 * always be in synch with the top bit indicating to any potential concurrent
52 * reader if the value in memory is up to date or not with regards to the
53 * needed increment. And any race in updating the value in memory is harmless
54 * as the same value would simply be stored more than once.
55 *
56 * The only restriction for the algorithm to work properly is that this
57 * code must be executed at least once per each half period of the 32-bit
58 * counter to properly update the state bit in memory. This is usually not a
59 * problem in practice, but if it is then a kernel timer could be scheduled
60 * to manage for this code to be executed often enough.
61 *
62 * Note that the top bit (bit 63) in the returned value should be considered
63 * as garbage. It is not cleared here because callers are likely to use a
64 * multiplier on the returned value which can get rid of the top bit
65 * implicitly by making the multiplier even, therefore saving on a runtime
66 * clear-bit instruction. Otherwise caller must remember to clear the top
67 * bit explicitly.
68 */
69#define cnt32_to_63(cnt_lo) \
70({ \
71 static volatile u32 __m_cnt_hi; \
72 union cnt32_to_63 __x; \
73 __x.hi = __m_cnt_hi; \
74 __x.lo = (cnt_lo); \
75 if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \
76 __m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \
77 __x.val; \
78})
79
80#endif