ssb: SPROM: extract each core power info

We already extract some basic info but it's incomplete, reads info
about the first core only. Used data structure doesn't allow easy
adding of more cores.
This patch adds new struct and array for storing power info. The plan
is to: switch all extractors (including the ones using NVRAM) to new
struct, switch drivers, then deprecate and finally drop old SSB fields.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

2 files changed, 42 insertions, 0 deletions

diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index dcf35b0f303a..bbc2612cb64a 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -16,6 +16,12 @@ struct pcmcia_device;
 struct ssb_bus;
 struct ssb_driver;
 
+struct ssb_sprom_core_pwr_info {
+        u8 itssi_2g, itssi_5g;
+        u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+        u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+};
+
 struct ssb_sprom {
         u8 revision;
         u8 il0mac[6];           /* MAC address for 802.11b/g */
@@ -82,6 +88,8 @@ struct ssb_sprom {
         u16 boardflags2_hi;     /* Board flags (bits 48-63) */
         /* TODO store board flags in a single u64 */
 
+        struct ssb_sprom_core_pwr_info core_pwr_info[4];
+
         /* Antenna gain values for up to 4 antennas
          * on each band. Values in dBm/4 (Q5.2). Negative gain means the
          * loss in the connectors is bigger than the gain. */
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index c814ae6eeb22..40b1ef8595ee 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -449,6 +449,39 @@
 #define SSB_SPROM8_TS_SLP_OPT_CORRX     0x00B6
 #define SSB_SPROM8_FOC_HWIQ_IQSWP       0x00B8
 #define SSB_SPROM8_PHYCAL_TEMPDELTA     0x00BA
+
+/* There are 4 blocks with power info sharing the same layout */
+#define SSB_SROM8_PWR_INFO_CORE0        0x00C0
+#define SSB_SROM8_PWR_INFO_CORE1        0x00E0
+#define SSB_SROM8_PWR_INFO_CORE2        0x0100
+#define SSB_SROM8_PWR_INFO_CORE3        0x0120
+
+#define SSB_SROM8_2G_MAXP_ITSSI         0x00
+#define  SSB_SPROM8_2G_MAXP             0x00FF
+#define  SSB_SPROM8_2G_ITSSI            0xFF00
+#define  SSB_SPROM8_2G_ITSSI_SHIFT      8
+#define SSB_SROM8_2G_PA_0               0x02    /* 2GHz power amp settings */
+#define SSB_SROM8_2G_PA_1               0x04
+#define SSB_SROM8_2G_PA_2               0x06
+#define SSB_SROM8_5G_MAXP_ITSSI         0x08    /* 5GHz ITSSI and 5.3GHz Max Power */
+#define  SSB_SPROM8_5G_MAXP             0x00FF
+#define  SSB_SPROM8_5G_ITSSI            0xFF00
+#define  SSB_SPROM8_5G_ITSSI_SHIFT      8
+#define SSB_SPROM8_5GHL_MAXP            0x0A    /* 5.2GHz and 5.8GHz Max Power */
+#define  SSB_SPROM8_5GH_MAXP            0x00FF
+#define  SSB_SPROM8_5GL_MAXP            0xFF00
+#define  SSB_SPROM8_5GL_MAXP_SHIFT      8
+#define SSB_SROM8_5G_PA_0               0x0C    /* 5.3GHz power amp settings */
+#define SSB_SROM8_5G_PA_1               0x0E
+#define SSB_SROM8_5G_PA_2               0x10
+#define SSB_SROM8_5GL_PA_0              0x12    /* 5.2GHz power amp settings */
+#define SSB_SROM8_5GL_PA_1              0x14
+#define SSB_SROM8_5GL_PA_2              0x16
+#define SSB_SROM8_5GH_PA_0              0x18    /* 5.8GHz power amp settings */
+#define SSB_SROM8_5GH_PA_1              0x1A
+#define SSB_SROM8_5GH_PA_2              0x1C
+
+/* TODO: Make it deprecated */
 #define SSB_SPROM8_MAXP_BG              0x00C0  /* Max Power 2GHz in path 1 */
 #define  SSB_SPROM8_MAXP_BG_MASK        0x00FF  /* Mask for Max Power 2GHz */
 #define  SSB_SPROM8_ITSSI_BG            0xFF00  /* Mask for path 1 itssi_bg */
@@ -473,6 +506,7 @@
 #define SSB_SPROM8_PA1HIB0              0x00D8  /* 5.8GHz power amp settings */
 #define SSB_SPROM8_PA1HIB1              0x00DA
 #define SSB_SPROM8_PA1HIB2              0x00DC
+
 #define SSB_SPROM8_CCK2GPO              0x0140  /* CCK power offset */
 #define SSB_SPROM8_OFDM2GPO             0x0142  /* 2.4GHz OFDM power offset */
 #define SSB_SPROM8_OFDM5GPO             0x0146  /* 5.3GHz OFDM power offset */