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authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-25 20:04:37 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-25 20:04:37 -0400
commit987fed3bf6982f2627d4fa242caa9026ef61132a (patch)
tree5f97fbf35fbd2b2868c4783ceec0cfa61990d53a /include
parented4fc720e1912eb36ca654d03c88c48845ed39b2 (diff)
parent8b169b5f1f46da8ece1ce7304cda7155fffe3892 (diff)
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (28 commits) drm: remove unused #include <linux/version.h>'s drm/radeon: fix driver initialization order so radeon kms can be builtin drm: Fix shifts which were miscalculated when converting from bitfields. drm/radeon: Clear surface registers at initialization time. drm/radeon: Don't initialize acceleration related fields of struct fb_info. drm/radeon: fix radeon kms framebuffer device drm/i915: initialize fence registers to zero when loading GEM drm/i915: Fix HDMI regression introduced in new chipset support drm/i915: fix LFP data fetch drm/i915: set TV detection mode when tv is already connected drm/i915: Catch up to obj_priv->page_list rename in disabled debug code. drm/i915: Fix size_t handling in off-by-default debug printfs drm/i915: Don't change the blank/sync width when calculating scaled modes drm/i915: Add support for changing LVDS panel fitting using an output property. drm/i915: correct suspend/resume ordering drm/i915: Add missing dependency on Intel AGP support. drm/i915: Generate 2MHz clock for display port aux channel I/O. Retry I/O. drm/i915: Clarify error returns from display port aux channel I/O drm/i915: Add CLKCFG register definition drm/i915: Split array of DAC limits into separate structures. ...
Diffstat (limited to 'include')
-rw-r--r--include/drm/drm_edid.h38
1 files changed, 19 insertions, 19 deletions
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index c263e4d71754..7d6c9a2dfcbb 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -35,11 +35,11 @@ struct est_timings {
35} __attribute__((packed)); 35} __attribute__((packed));
36 36
37/* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */ 37/* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */
38#define EDID_TIMING_ASPECT_SHIFT 0 38#define EDID_TIMING_ASPECT_SHIFT 6
39#define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT) 39#define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT)
40 40
41/* need to add 60 */ 41/* need to add 60 */
42#define EDID_TIMING_VFREQ_SHIFT 2 42#define EDID_TIMING_VFREQ_SHIFT 0
43#define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT) 43#define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT)
44 44
45struct std_timing { 45struct std_timing {
@@ -47,11 +47,11 @@ struct std_timing {
47 u8 vfreq_aspect; 47 u8 vfreq_aspect;
48} __attribute__((packed)); 48} __attribute__((packed));
49 49
50#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 6) 50#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1)
51#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 5) 51#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2)
52#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) 52#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3)
53#define DRM_EDID_PT_STEREO (1 << 2) 53#define DRM_EDID_PT_STEREO (1 << 5)
54#define DRM_EDID_PT_INTERLACED (1 << 1) 54#define DRM_EDID_PT_INTERLACED (1 << 7)
55 55
56/* If detailed data is pixel timing */ 56/* If detailed data is pixel timing */
57struct detailed_pixel_timing { 57struct detailed_pixel_timing {
@@ -93,7 +93,7 @@ struct detailed_data_monitor_range {
93} __attribute__((packed)); 93} __attribute__((packed));
94 94
95struct detailed_data_wpindex { 95struct detailed_data_wpindex {
96 u8 white_xy_lo; /* Upper 2 bits each */ 96 u8 white_yx_lo; /* Lower 2 bits each */
97 u8 white_x_hi; 97 u8 white_x_hi;
98 u8 white_y_hi; 98 u8 white_y_hi;
99 u8 gamma; /* need to divide by 100 then add 1 */ 99 u8 gamma; /* need to divide by 100 then add 1 */
@@ -135,21 +135,21 @@ struct detailed_timing {
135 } data; 135 } data;
136} __attribute__((packed)); 136} __attribute__((packed));
137 137
138#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 7) 138#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0)
139#define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 5) 139#define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1)
140#define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 4) 140#define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2)
141#define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3) 141#define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3)
142#define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 2) 142#define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4)
143#define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 1) 143#define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5)
144#define DRM_EDID_INPUT_DIGITAL (1 << 0) /* bits above must be zero if set */ 144#define DRM_EDID_INPUT_DIGITAL (1 << 7) /* bits below must be zero if set */
145 145
146#define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 7) 146#define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0)
147#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 6) 147#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1)
148#define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 5) 148#define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2)
149#define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */ 149#define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */
150#define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 2) 150#define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5)
151#define DRM_EDID_FEATURE_PM_SUSPEND (1 << 1) 151#define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6)
152#define DRM_EDID_FEATURE_PM_STANDBY (1 << 0) 152#define DRM_EDID_FEATURE_PM_STANDBY (1 << 7)
153 153
154struct edid { 154struct edid {
155 u8 header[8]; 155 u8 header[8];