diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-29 17:06:55 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-29 17:06:55 -0400 |
commit | 82798a17ad40df827d465329a20ace80497f9b32 (patch) | |
tree | 449ba69dc5a5e19a56b2a9d12d218f9486e5316d /include | |
parent | db8185360d91c01f6e482db5ee402c0ad90dec52 (diff) | |
parent | 1a3b7920fe55247d39c3e1ac1e9b8aca607d0188 (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (34 commits)
[MIPS] tb0219: Update copyright message.
[MIPS] MT: Fix bug in multithreaded kernels.
[MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs.
Author: Ralf Baechle <ralf@linux-mips.org>
[MIPS] sb1250: Enable GenBus IDE in defconfig.
[MIPS] vmlinux.ld.S: correctly indent .data section
[MIPS] c-r3k: Implement flush_cache_range()
[MIPS] Store sign-extend register values for PTRACE_GETREGS
[MIPS] Alchemy: Register platform devices
[MIPS] Add len and addr validation for MAP_FIXED mappings.
[MIPS] IRIX: Fix off-by-one error in signal compat code.
[MIPS] time: Replace plat_timer_setup with modern APIs.
[MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver.
[MIPS] time: Make c0_compare_int_usable faster
[MIPS] time: Fix cevt-r4k.c for 64-bit kernel
[MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().
[MIPS] txx9tmr clockevent/clocksource driver
[MIPS] Add mips_hpt_frequency check to mips_clockevent_init().
[MIPS] IP32: Fixes after interrupt renumbering.
[MIPS] IP27: Fix slice logic to work for arbitrary number of slices.
...
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-mips/ip32/ip32_ints.h | 4 | ||||
-rw-r--r-- | include/asm-mips/jmr3927/jmr3927.h | 9 | ||||
-rw-r--r-- | include/asm-mips/jmr3927/tx3927.h | 4 | ||||
-rw-r--r-- | include/asm-mips/jmr3927/txx927.h | 37 | ||||
-rw-r--r-- | include/asm-mips/time.h | 2 | ||||
-rw-r--r-- | include/asm-mips/tx4927/tx4927_pci.h | 3 | ||||
-rw-r--r-- | include/asm-mips/tx4938/tx4938.h | 1 | ||||
-rw-r--r-- | include/asm-mips/txx9tmr.h | 67 |
8 files changed, 76 insertions, 51 deletions
diff --git a/include/asm-mips/ip32/ip32_ints.h b/include/asm-mips/ip32/ip32_ints.h index 042f821899a8..ab5612f90f6f 100644 --- a/include/asm-mips/ip32/ip32_ints.h +++ b/include/asm-mips/ip32/ip32_ints.h | |||
@@ -22,10 +22,12 @@ enum ip32_irq_no { | |||
22 | * CPU interrupts are 0 ... 7 | 22 | * CPU interrupts are 0 ... 7 |
23 | */ | 23 | */ |
24 | 24 | ||
25 | CRIME_IRQ_BASE = MIPS_CPU_IRQ_BASE, | ||
26 | |||
25 | /* | 27 | /* |
26 | * MACE | 28 | * MACE |
27 | */ | 29 | */ |
28 | MACE_VID_IN1_IRQ = MIPS_CPU_IRQ_BASE + 8, | 30 | MACE_VID_IN1_IRQ = CRIME_IRQ_BASE, |
29 | MACE_VID_IN2_IRQ, | 31 | MACE_VID_IN2_IRQ, |
30 | MACE_VID_OUT_IRQ, | 32 | MACE_VID_OUT_IRQ, |
31 | MACE_ETHERNET_IRQ, | 33 | MACE_ETHERNET_IRQ, |
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h index b2dc35f56181..81602c8047eb 100644 --- a/include/asm-mips/jmr3927/jmr3927.h +++ b/include/asm-mips/jmr3927/jmr3927.h | |||
@@ -132,9 +132,7 @@ | |||
132 | #define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA) | 132 | #define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA) |
133 | #define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO) | 133 | #define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO) |
134 | #define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI) | 134 | #define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI) |
135 | #define JMR3927_IRQ_IRC_TMR0 (JMR3927_IRQ_IRC + TX3927_IR_TMR0) | 135 | #define JMR3927_IRQ_IRC_TMR(ch) (JMR3927_IRQ_IRC + TX3927_IR_TMR(ch)) |
136 | #define JMR3927_IRQ_IRC_TMR1 (JMR3927_IRQ_IRC + TX3927_IR_TMR1) | ||
137 | #define JMR3927_IRQ_IRC_TMR2 (JMR3927_IRQ_IRC + TX3927_IR_TMR2) | ||
138 | #define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA) | 136 | #define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA) |
139 | #define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB) | 137 | #define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB) |
140 | #define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC) | 138 | #define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC) |
@@ -148,17 +146,12 @@ | |||
148 | #define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1 | 146 | #define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1 |
149 | /* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */ | 147 | /* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */ |
150 | #define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3 | 148 | #define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3 |
151 | /* Clock Tick (10ms) */ | ||
152 | #define JMR3927_IRQ_TICK JMR3927_IRQ_IRC_TMR0 | ||
153 | 149 | ||
154 | /* Clocks */ | 150 | /* Clocks */ |
155 | #define JMR3927_CORECLK 132710400 /* 132.7MHz */ | 151 | #define JMR3927_CORECLK 132710400 /* 132.7MHz */ |
156 | #define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */ | 152 | #define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */ |
157 | #define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */ | 153 | #define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */ |
158 | 154 | ||
159 | #define jmr3927_tmrptr tx3927_tmrptr(0) /* TMR0 */ | ||
160 | |||
161 | |||
162 | /* | 155 | /* |
163 | * TX3927 Pin Configuration: | 156 | * TX3927 Pin Configuration: |
164 | * | 157 | * |
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/jmr3927/tx3927.h index 211bcf47fffb..338f99882a39 100644 --- a/include/asm-mips/jmr3927/tx3927.h +++ b/include/asm-mips/jmr3927/tx3927.h | |||
@@ -222,9 +222,7 @@ struct tx3927_ccfg_reg { | |||
222 | #define TX3927_IR_DMA 8 | 222 | #define TX3927_IR_DMA 8 |
223 | #define TX3927_IR_PIO 9 | 223 | #define TX3927_IR_PIO 9 |
224 | #define TX3927_IR_PCI 10 | 224 | #define TX3927_IR_PCI 10 |
225 | #define TX3927_IR_TMR0 13 | 225 | #define TX3927_IR_TMR(ch) (13 + (ch)) |
226 | #define TX3927_IR_TMR1 14 | ||
227 | #define TX3927_IR_TMR2 15 | ||
228 | #define TX3927_NUM_IR 16 | 226 | #define TX3927_NUM_IR 16 |
229 | 227 | ||
230 | /* | 228 | /* |
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/jmr3927/txx927.h index 58a8ff6be815..0474fe8dac3f 100644 --- a/include/asm-mips/jmr3927/txx927.h +++ b/include/asm-mips/jmr3927/txx927.h | |||
@@ -10,22 +10,6 @@ | |||
10 | #ifndef __ASM_TXX927_H | 10 | #ifndef __ASM_TXX927_H |
11 | #define __ASM_TXX927_H | 11 | #define __ASM_TXX927_H |
12 | 12 | ||
13 | struct txx927_tmr_reg { | ||
14 | volatile unsigned long tcr; | ||
15 | volatile unsigned long tisr; | ||
16 | volatile unsigned long cpra; | ||
17 | volatile unsigned long cprb; | ||
18 | volatile unsigned long itmr; | ||
19 | volatile unsigned long unused0[3]; | ||
20 | volatile unsigned long ccdr; | ||
21 | volatile unsigned long unused1[3]; | ||
22 | volatile unsigned long pgmr; | ||
23 | volatile unsigned long unused2[3]; | ||
24 | volatile unsigned long wtmr; | ||
25 | volatile unsigned long unused3[43]; | ||
26 | volatile unsigned long trr; | ||
27 | }; | ||
28 | |||
29 | struct txx927_sio_reg { | 13 | struct txx927_sio_reg { |
30 | volatile unsigned long lcr; | 14 | volatile unsigned long lcr; |
31 | volatile unsigned long dicr; | 15 | volatile unsigned long dicr; |
@@ -51,27 +35,6 @@ struct txx927_pio_reg { | |||
51 | }; | 35 | }; |
52 | 36 | ||
53 | /* | 37 | /* |
54 | * TMR | ||
55 | */ | ||
56 | /* TMTCR : Timer Control */ | ||
57 | #define TXx927_TMTCR_TCE 0x00000080 | ||
58 | #define TXx927_TMTCR_CCDE 0x00000040 | ||
59 | #define TXx927_TMTCR_CRE 0x00000020 | ||
60 | #define TXx927_TMTCR_ECES 0x00000008 | ||
61 | #define TXx927_TMTCR_CCS 0x00000004 | ||
62 | #define TXx927_TMTCR_TMODE_MASK 0x00000003 | ||
63 | #define TXx927_TMTCR_TMODE_ITVL 0x00000000 | ||
64 | |||
65 | /* TMTISR : Timer Int. Status */ | ||
66 | #define TXx927_TMTISR_TPIBS 0x00000004 | ||
67 | #define TXx927_TMTISR_TPIAS 0x00000002 | ||
68 | #define TXx927_TMTISR_TIIS 0x00000001 | ||
69 | |||
70 | /* TMTITMR : Interval Timer Mode */ | ||
71 | #define TXx927_TMTITMR_TIIE 0x00008000 | ||
72 | #define TXx927_TMTITMR_TZCE 0x00000001 | ||
73 | |||
74 | /* | ||
75 | * SIO | 38 | * SIO |
76 | */ | 39 | */ |
77 | /* SILCR : Line Control */ | 40 | /* SILCR : Line Control */ |
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h index bc47af313bcd..0a6bc7dc158e 100644 --- a/include/asm-mips/time.h +++ b/include/asm-mips/time.h | |||
@@ -58,7 +58,6 @@ extern void local_timer_interrupt(int irq, void *dev_id); | |||
58 | */ | 58 | */ |
59 | struct irqaction; | 59 | struct irqaction; |
60 | extern void plat_time_init(void); | 60 | extern void plat_time_init(void); |
61 | extern void plat_timer_setup(struct irqaction *irq); | ||
62 | 61 | ||
63 | /* | 62 | /* |
64 | * mips_hpt_frequency - must be set if you intend to use an R4k-compatible | 63 | * mips_hpt_frequency - must be set if you intend to use an R4k-compatible |
@@ -78,6 +77,7 @@ extern int (*perf_irq)(void); | |||
78 | */ | 77 | */ |
79 | #ifdef CONFIG_CEVT_R4K | 78 | #ifdef CONFIG_CEVT_R4K |
80 | extern void mips_clockevent_init(void); | 79 | extern void mips_clockevent_init(void); |
80 | extern unsigned int __weak get_c0_compare_int(void); | ||
81 | #else | 81 | #else |
82 | static inline void mips_clockevent_init(void) | 82 | static inline void mips_clockevent_init(void) |
83 | { | 83 | { |
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h index f98b2bb719d5..3f1e470192e3 100644 --- a/include/asm-mips/tx4927/tx4927_pci.h +++ b/include/asm-mips/tx4927/tx4927_pci.h | |||
@@ -9,6 +9,7 @@ | |||
9 | #define __ASM_TX4927_TX4927_PCI_H | 9 | #define __ASM_TX4927_TX4927_PCI_H |
10 | 10 | ||
11 | #define TX4927_CCFG_TOE 0x00004000 | 11 | #define TX4927_CCFG_TOE 0x00004000 |
12 | #define TX4927_CCFG_TINTDIS 0x01000000 | ||
12 | 13 | ||
13 | #define TX4927_PCIMEM 0x08000000 | 14 | #define TX4927_PCIMEM 0x08000000 |
14 | #define TX4927_PCIMEM_SIZE 0x08000000 | 15 | #define TX4927_PCIMEM_SIZE 0x08000000 |
@@ -20,6 +21,8 @@ | |||
20 | #define TX4927_PCIC_REG 0xff1fd000 | 21 | #define TX4927_PCIC_REG 0xff1fd000 |
21 | #define TX4927_CCFG_REG 0xff1fe000 | 22 | #define TX4927_CCFG_REG 0xff1fe000 |
22 | #define TX4927_IRC_REG 0xff1ff600 | 23 | #define TX4927_IRC_REG 0xff1ff600 |
24 | #define TX4927_NR_TMR 3 | ||
25 | #define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100) | ||
23 | #define TX4927_CE3 0x17f00000 /* 1M */ | 26 | #define TX4927_CE3 0x17f00000 /* 1M */ |
24 | #define TX4927_PCIRESET_ADDR 0xbc00f006 | 27 | #define TX4927_PCIRESET_ADDR 0xbc00f006 |
25 | #define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020) | 28 | #define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020) |
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/tx4938/tx4938.h index 650b010761f9..f7c448b90578 100644 --- a/include/asm-mips/tx4938/tx4938.h +++ b/include/asm-mips/tx4938/tx4938.h | |||
@@ -641,7 +641,6 @@ struct tx4938_ccfg_reg { | |||
641 | #define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG) | 641 | #define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG) |
642 | #define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG) | 642 | #define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG) |
643 | #define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG) | 643 | #define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG) |
644 | #define tx4938_tmrptr(ch) ((struct tx4938_tmr_reg *)TX4938_TMR_REG(ch)) | ||
645 | #define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch)) | 644 | #define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch)) |
646 | #define tx4938_pioptr ((struct tx4938_pio_reg *)TX4938_PIO_REG) | 645 | #define tx4938_pioptr ((struct tx4938_pio_reg *)TX4938_PIO_REG) |
647 | #define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG) | 646 | #define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG) |
diff --git a/include/asm-mips/txx9tmr.h b/include/asm-mips/txx9tmr.h new file mode 100644 index 000000000000..67f70a8f09bd --- /dev/null +++ b/include/asm-mips/txx9tmr.h | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * include/asm-mips/txx9tmr.h | ||
3 | * TX39/TX49 timer controller definitions. | ||
4 | * | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | */ | ||
9 | #ifndef __ASM_TXX9TMR_H | ||
10 | #define __ASM_TXX9TMR_H | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | |||
14 | struct txx9_tmr_reg { | ||
15 | u32 tcr; | ||
16 | u32 tisr; | ||
17 | u32 cpra; | ||
18 | u32 cprb; | ||
19 | u32 itmr; | ||
20 | u32 unused0[3]; | ||
21 | u32 ccdr; | ||
22 | u32 unused1[3]; | ||
23 | u32 pgmr; | ||
24 | u32 unused2[3]; | ||
25 | u32 wtmr; | ||
26 | u32 unused3[43]; | ||
27 | u32 trr; | ||
28 | }; | ||
29 | |||
30 | /* TMTCR : Timer Control */ | ||
31 | #define TXx9_TMTCR_TCE 0x00000080 | ||
32 | #define TXx9_TMTCR_CCDE 0x00000040 | ||
33 | #define TXx9_TMTCR_CRE 0x00000020 | ||
34 | #define TXx9_TMTCR_ECES 0x00000008 | ||
35 | #define TXx9_TMTCR_CCS 0x00000004 | ||
36 | #define TXx9_TMTCR_TMODE_MASK 0x00000003 | ||
37 | #define TXx9_TMTCR_TMODE_ITVL 0x00000000 | ||
38 | #define TXx9_TMTCR_TMODE_PGEN 0x00000001 | ||
39 | #define TXx9_TMTCR_TMODE_WDOG 0x00000002 | ||
40 | |||
41 | /* TMTISR : Timer Int. Status */ | ||
42 | #define TXx9_TMTISR_TPIBS 0x00000004 | ||
43 | #define TXx9_TMTISR_TPIAS 0x00000002 | ||
44 | #define TXx9_TMTISR_TIIS 0x00000001 | ||
45 | |||
46 | /* TMITMR : Interval Timer Mode */ | ||
47 | #define TXx9_TMITMR_TIIE 0x00008000 | ||
48 | #define TXx9_TMITMR_TZCE 0x00000001 | ||
49 | |||
50 | /* TMWTMR : Watchdog Timer Mode */ | ||
51 | #define TXx9_TMWTMR_TWIE 0x00008000 | ||
52 | #define TXx9_TMWTMR_WDIS 0x00000080 | ||
53 | #define TXx9_TMWTMR_TWC 0x00000001 | ||
54 | |||
55 | void txx9_clocksource_init(unsigned long baseaddr, | ||
56 | unsigned int imbusclk); | ||
57 | void txx9_clockevent_init(unsigned long baseaddr, int irq, | ||
58 | unsigned int imbusclk); | ||
59 | void txx9_tmr_init(unsigned long baseaddr); | ||
60 | |||
61 | #ifdef CONFIG_CPU_TX39XX | ||
62 | #define TXX9_TIMER_BITS 24 | ||
63 | #else | ||
64 | #define TXX9_TIMER_BITS 32 | ||
65 | #endif | ||
66 | |||
67 | #endif /* __ASM_TXX9TMR_H */ | ||