diff options
author | Magnus Damm <damm@igel.co.jp> | 2008-07-17 06:16:11 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-07-28 05:10:37 -0400 |
commit | 6c7d826cf6ff05264f9af04410aee82a08edfb9f (patch) | |
tree | ce110c55b7429071732321f9fcad19b97461f887 /include | |
parent | 9ca6ecac505002d0c34b47b394f39aa14b0e6fb6 (diff) |
sh: Use clk_always_enable() on sh7722 / Migo-R / SE7722
Use clk_always_enable() on the sh7722 processor and in the board code
for Migo-R and Solution Engine 7722. Remove duplicate MSTPCR register
definitions.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-sh/migor.h | 4 | ||||
-rw-r--r-- | include/asm-sh/se7722.h | 4 |
2 files changed, 0 insertions, 8 deletions
diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h index 2329363afdc3..4c409a6dcfba 100644 --- a/include/asm-sh/migor.h +++ b/include/asm-sh/migor.h | |||
@@ -16,10 +16,6 @@ | |||
16 | #include <asm/addrspace.h> | 16 | #include <asm/addrspace.h> |
17 | 17 | ||
18 | /* GPIO */ | 18 | /* GPIO */ |
19 | #define MSTPCR0 0xa4150030 | ||
20 | #define MSTPCR1 0xa4150034 | ||
21 | #define MSTPCR2 0xa4150038 | ||
22 | |||
23 | #define PORT_PACR 0xa4050100 | 19 | #define PORT_PACR 0xa4050100 |
24 | #define PORT_PDCR 0xa4050106 | 20 | #define PORT_PDCR 0xa4050106 |
25 | #define PORT_PECR 0xa4050108 | 21 | #define PORT_PECR 0xa4050108 |
diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h index 3690fe5857a4..e971d9a82f4a 100644 --- a/include/asm-sh/se7722.h +++ b/include/asm-sh/se7722.h | |||
@@ -55,10 +55,6 @@ | |||
55 | 55 | ||
56 | #define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ | 56 | #define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ |
57 | /* GPIO */ | 57 | /* GPIO */ |
58 | #define MSTPCR0 0xA4150030UL | ||
59 | #define MSTPCR1 0xA4150034UL | ||
60 | #define MSTPCR2 0xA4150038UL | ||
61 | |||
62 | #define FPGA_IN 0xb1840000UL | 58 | #define FPGA_IN 0xb1840000UL |
63 | #define FPGA_OUT 0xb1840004UL | 59 | #define FPGA_OUT 0xb1840004UL |
64 | 60 | ||