diff options
author | Rabin Vincent <rabin.vincent@stericsson.com> | 2010-05-19 05:39:02 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2010-05-27 19:38:00 -0400 |
commit | 62579266cf9caca5b999560be2b5ceee42fc4d4d (patch) | |
tree | eda6066624c734ef3057a9dc568ebaf978499c1a /include | |
parent | 75907a1153b42100b7a5e960bfe47d208d726309 (diff) |
mfd: New AB8500 driver
Add a new driver to support the AB8500 Power Management chip, replacing
the current AB4500. The new driver replaces the old one, instead of an
incremental modification, because this is a substantial overhaul
including:
- Split of the driver into -core and -spi portions, to allow another
interface layer to be added
- Addition of interrupt support
- Switch to MFD core API for handling subdevices
- Simplification of the APIs to remove a redundant block parameter
- Rename of the APIs and macros from ab4500_* to ab8500_*
- Rename of the files from ab4500* to ab8500*
- Change of the driver name from ab4500 to ab8500
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mfd/ab4500.h | 262 | ||||
-rw-r--r-- | include/linux/mfd/ab8500.h | 128 |
2 files changed, 128 insertions, 262 deletions
diff --git a/include/linux/mfd/ab4500.h b/include/linux/mfd/ab4500.h deleted file mode 100644 index a42a7033ae53..000000000000 --- a/include/linux/mfd/ab4500.h +++ /dev/null | |||
@@ -1,262 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 ST-Ericsson | ||
3 | * | ||
4 | * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2, as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * AB4500 device core funtions, for client access | ||
11 | */ | ||
12 | #ifndef MFD_AB4500_H | ||
13 | #define MFD_AB4500_H | ||
14 | |||
15 | #include <linux/device.h> | ||
16 | |||
17 | /* | ||
18 | * AB4500 bank addresses | ||
19 | */ | ||
20 | #define AB4500_SYS_CTRL1_BLOCK 0x1 | ||
21 | #define AB4500_SYS_CTRL2_BLOCK 0x2 | ||
22 | #define AB4500_REGU_CTRL1 0x3 | ||
23 | #define AB4500_REGU_CTRL2 0x4 | ||
24 | #define AB4500_USB 0x5 | ||
25 | #define AB4500_TVOUT 0x6 | ||
26 | #define AB4500_DBI 0x7 | ||
27 | #define AB4500_ECI_AV_ACC 0x8 | ||
28 | #define AB4500_RESERVED 0x9 | ||
29 | #define AB4500_GPADC 0xA | ||
30 | #define AB4500_CHARGER 0xB | ||
31 | #define AB4500_GAS_GAUGE 0xC | ||
32 | #define AB4500_AUDIO 0xD | ||
33 | #define AB4500_INTERRUPT 0xE | ||
34 | #define AB4500_RTC 0xF | ||
35 | #define AB4500_MISC 0x10 | ||
36 | #define AB4500_DEBUG 0x12 | ||
37 | #define AB4500_PROD_TEST 0x13 | ||
38 | #define AB4500_OTP_EMUL 0x15 | ||
39 | |||
40 | /* | ||
41 | * System control 1 register offsets. | ||
42 | * Bank = 0x01 | ||
43 | */ | ||
44 | #define AB4500_TURNON_STAT_REG 0x0100 | ||
45 | #define AB4500_RESET_STAT_REG 0x0101 | ||
46 | #define AB4500_PONKEY1_PRESS_STAT_REG 0x0102 | ||
47 | |||
48 | #define AB4500_FSM_STAT1_REG 0x0140 | ||
49 | #define AB4500_FSM_STAT2_REG 0x0141 | ||
50 | #define AB4500_SYSCLK_REQ_STAT_REG 0x0142 | ||
51 | #define AB4500_USB_STAT1_REG 0x0143 | ||
52 | #define AB4500_USB_STAT2_REG 0x0144 | ||
53 | #define AB4500_STATUS_SPARE1_REG 0x0145 | ||
54 | #define AB4500_STATUS_SPARE2_REG 0x0146 | ||
55 | |||
56 | #define AB4500_CTRL1_REG 0x0180 | ||
57 | #define AB4500_CTRL2_REG 0x0181 | ||
58 | |||
59 | /* | ||
60 | * System control 2 register offsets. | ||
61 | * bank = 0x02 | ||
62 | */ | ||
63 | #define AB4500_CTRL3_REG 0x0200 | ||
64 | #define AB4500_MAIN_WDOG_CTRL_REG 0x0201 | ||
65 | #define AB4500_MAIN_WDOG_TIMER_REG 0x0202 | ||
66 | #define AB4500_LOW_BAT_REG 0x0203 | ||
67 | #define AB4500_BATT_OK_REG 0x0204 | ||
68 | #define AB4500_SYSCLK_TIMER_REG 0x0205 | ||
69 | #define AB4500_SMPSCLK_CTRL_REG 0x0206 | ||
70 | #define AB4500_SMPSCLK_SEL1_REG 0x0207 | ||
71 | #define AB4500_SMPSCLK_SEL2_REG 0x0208 | ||
72 | #define AB4500_SMPSCLK_SEL3_REG 0x0209 | ||
73 | #define AB4500_SYSULPCLK_CONF_REG 0x020A | ||
74 | #define AB4500_SYSULPCLK_CTRL1_REG 0x020B | ||
75 | #define AB4500_SYSCLK_CTRL_REG 0x020C | ||
76 | #define AB4500_SYSCLK_REQ1_VALID_REG 0x020D | ||
77 | #define AB4500_SYSCLK_REQ_VALID_REG 0x020E | ||
78 | #define AB4500_SYSCTRL_SPARE_REG 0x020F | ||
79 | #define AB4500_PAD_CONF_REG 0x0210 | ||
80 | |||
81 | /* | ||
82 | * Regu control1 register offsets | ||
83 | * Bank = 0x03 | ||
84 | */ | ||
85 | #define AB4500_REGU_SERIAL_CTRL1_REG 0x0300 | ||
86 | #define AB4500_REGU_SERIAL_CTRL2_REG 0x0301 | ||
87 | #define AB4500_REGU_SERIAL_CTRL3_REG 0x0302 | ||
88 | #define AB4500_REGU_REQ_CTRL1_REG 0x0303 | ||
89 | #define AB4500_REGU_REQ_CTRL2_REG 0x0304 | ||
90 | #define AB4500_REGU_REQ_CTRL3_REG 0x0305 | ||
91 | #define AB4500_REGU_REQ_CTRL4_REG 0x0306 | ||
92 | #define AB4500_REGU_MISC1_REG 0x0380 | ||
93 | #define AB4500_REGU_OTGSUPPLY_CTRL_REG 0x0381 | ||
94 | #define AB4500_REGU_VUSB_CTRL_REG 0x0382 | ||
95 | #define AB4500_REGU_VAUDIO_SUPPLY_REG 0x0383 | ||
96 | #define AB4500_REGU_CTRL1_SPARE_REG 0x0384 | ||
97 | |||
98 | /* | ||
99 | * Regu control2 Vmod register offsets | ||
100 | */ | ||
101 | #define AB4500_REGU_VMOD_REGU_REG 0x0440 | ||
102 | #define AB4500_REGU_VMOD_SEL1_REG 0x0441 | ||
103 | #define AB4500_REGU_VMOD_SEL2_REG 0x0442 | ||
104 | #define AB4500_REGU_CTRL_DISCH_REG 0x0443 | ||
105 | #define AB4500_REGU_CTRL_DISCH2_REG 0x0444 | ||
106 | |||
107 | /* | ||
108 | * USB/ULPI register offsets | ||
109 | * Bank : 0x5 | ||
110 | */ | ||
111 | #define AB4500_USB_LINE_STAT_REG 0x0580 | ||
112 | #define AB4500_USB_LINE_CTRL1_REG 0x0581 | ||
113 | #define AB4500_USB_LINE_CTRL2_REG 0x0582 | ||
114 | #define AB4500_USB_LINE_CTRL3_REG 0x0583 | ||
115 | #define AB4500_USB_LINE_CTRL4_REG 0x0584 | ||
116 | #define AB4500_USB_LINE_CTRL5_REG 0x0585 | ||
117 | #define AB4500_USB_OTG_CTRL_REG 0x0587 | ||
118 | #define AB4500_USB_OTG_STAT_REG 0x0588 | ||
119 | #define AB4500_USB_OTG_STAT_REG 0x0588 | ||
120 | #define AB4500_USB_CTRL_SPARE_REG 0x0589 | ||
121 | #define AB4500_USB_PHY_CTRL_REG 0x058A | ||
122 | |||
123 | /* | ||
124 | * TVOUT / CTRL register offsets | ||
125 | * Bank : 0x06 | ||
126 | */ | ||
127 | #define AB4500_TVOUT_CTRL_REG 0x0680 | ||
128 | |||
129 | /* | ||
130 | * DBI register offsets | ||
131 | * Bank : 0x07 | ||
132 | */ | ||
133 | #define AB4500_DBI_REG1_REG 0x0700 | ||
134 | #define AB4500_DBI_REG2_REG 0x0701 | ||
135 | |||
136 | /* | ||
137 | * ECI regsiter offsets | ||
138 | * Bank : 0x08 | ||
139 | */ | ||
140 | #define AB4500_ECI_CTRL_REG 0x0800 | ||
141 | #define AB4500_ECI_HOOKLEVEL_REG 0x0801 | ||
142 | #define AB4500_ECI_DATAOUT_REG 0x0802 | ||
143 | #define AB4500_ECI_DATAIN_REG 0x0803 | ||
144 | |||
145 | /* | ||
146 | * AV Connector register offsets | ||
147 | * Bank : 0x08 | ||
148 | */ | ||
149 | #define AB4500_AV_CONN_REG 0x0840 | ||
150 | |||
151 | /* | ||
152 | * Accessory detection register offsets | ||
153 | * Bank : 0x08 | ||
154 | */ | ||
155 | #define AB4500_ACC_DET_DB1_REG 0x0880 | ||
156 | #define AB4500_ACC_DET_DB2_REG 0x0881 | ||
157 | |||
158 | /* | ||
159 | * GPADC register offsets | ||
160 | * Bank : 0x0A | ||
161 | */ | ||
162 | #define AB4500_GPADC_CTRL1_REG 0x0A00 | ||
163 | #define AB4500_GPADC_CTRL2_REG 0x0A01 | ||
164 | #define AB4500_GPADC_CTRL3_REG 0x0A02 | ||
165 | #define AB4500_GPADC_AUTO_TIMER_REG 0x0A03 | ||
166 | #define AB4500_GPADC_STAT_REG 0x0A04 | ||
167 | #define AB4500_GPADC_MANDATAL_REG 0x0A05 | ||
168 | #define AB4500_GPADC_MANDATAH_REG 0x0A06 | ||
169 | #define AB4500_GPADC_AUTODATAL_REG 0x0A07 | ||
170 | #define AB4500_GPADC_AUTODATAH_REG 0x0A08 | ||
171 | #define AB4500_GPADC_MUX_CTRL_REG 0x0A09 | ||
172 | |||
173 | /* | ||
174 | * Charger / status register offfsets | ||
175 | * Bank : 0x0B | ||
176 | */ | ||
177 | #define AB4500_CH_STATUS1_REG 0x0B00 | ||
178 | #define AB4500_CH_STATUS2_REG 0x0B01 | ||
179 | #define AB4500_CH_USBCH_STAT1_REG 0x0B02 | ||
180 | #define AB4500_CH_USBCH_STAT2_REG 0x0B03 | ||
181 | #define AB4500_CH_FSM_STAT_REG 0x0B04 | ||
182 | #define AB4500_CH_STAT_REG 0x0B05 | ||
183 | |||
184 | /* | ||
185 | * Charger / control register offfsets | ||
186 | * Bank : 0x0B | ||
187 | */ | ||
188 | #define AB4500_CH_VOLT_LVL_REG 0x0B40 | ||
189 | |||
190 | /* | ||
191 | * Charger / main control register offfsets | ||
192 | * Bank : 0x0B | ||
193 | */ | ||
194 | #define AB4500_MCH_CTRL1 0x0B80 | ||
195 | #define AB4500_MCH_CTRL2 0x0B81 | ||
196 | #define AB4500_MCH_IPT_CURLVL_REG 0x0B82 | ||
197 | #define AB4500_CH_WD_REG 0x0B83 | ||
198 | |||
199 | /* | ||
200 | * Charger / USB control register offsets | ||
201 | * Bank : 0x0B | ||
202 | */ | ||
203 | #define AB4500_USBCH_CTRL1_REG 0x0BC0 | ||
204 | #define AB4500_USBCH_CTRL2_REG 0x0BC1 | ||
205 | #define AB4500_USBCH_IPT_CRNTLVL_REG 0x0BC2 | ||
206 | |||
207 | /* | ||
208 | * RTC bank register offsets | ||
209 | * Bank : 0xF | ||
210 | */ | ||
211 | #define AB4500_RTC_SOFF_STAT_REG 0x0F00 | ||
212 | #define AB4500_RTC_CC_CONF_REG 0x0F01 | ||
213 | #define AB4500_RTC_READ_REQ_REG 0x0F02 | ||
214 | #define AB4500_RTC_WATCH_TSECMID_REG 0x0F03 | ||
215 | #define AB4500_RTC_WATCH_TSECHI_REG 0x0F04 | ||
216 | #define AB4500_RTC_WATCH_TMIN_LOW_REG 0x0F05 | ||
217 | #define AB4500_RTC_WATCH_TMIN_MID_REG 0x0F06 | ||
218 | #define AB4500_RTC_WATCH_TMIN_HI_REG 0x0F07 | ||
219 | #define AB4500_RTC_ALRM_MIN_LOW_REG 0x0F08 | ||
220 | #define AB4500_RTC_ALRM_MIN_MID_REG 0x0F09 | ||
221 | #define AB4500_RTC_ALRM_MIN_HI_REG 0x0F0A | ||
222 | #define AB4500_RTC_STAT_REG 0x0F0B | ||
223 | #define AB4500_RTC_BKUP_CHG_REG 0x0F0C | ||
224 | #define AB4500_RTC_FORCE_BKUP_REG 0x0F0D | ||
225 | #define AB4500_RTC_CALIB_REG 0x0F0E | ||
226 | #define AB4500_RTC_SWITCH_STAT_REG 0x0F0F | ||
227 | |||
228 | /* | ||
229 | * PWM Out generators | ||
230 | * Bank: 0x10 | ||
231 | */ | ||
232 | #define AB4500_PWM_OUT_CTRL1_REG 0x1060 | ||
233 | #define AB4500_PWM_OUT_CTRL2_REG 0x1061 | ||
234 | #define AB4500_PWM_OUT_CTRL3_REG 0x1062 | ||
235 | #define AB4500_PWM_OUT_CTRL4_REG 0x1063 | ||
236 | #define AB4500_PWM_OUT_CTRL5_REG 0x1064 | ||
237 | #define AB4500_PWM_OUT_CTRL6_REG 0x1065 | ||
238 | #define AB4500_PWM_OUT_CTRL7_REG 0x1066 | ||
239 | |||
240 | #define AB4500_I2C_PAD_CTRL_REG 0x1067 | ||
241 | #define AB4500_REV_REG 0x1080 | ||
242 | |||
243 | /** | ||
244 | * struct ab4500 | ||
245 | * @spi: spi device structure | ||
246 | * @tx_buf: transmit buffer | ||
247 | * @rx_buf: receive buffer | ||
248 | * @lock: sync primitive | ||
249 | */ | ||
250 | struct ab4500 { | ||
251 | struct spi_device *spi; | ||
252 | unsigned long tx_buf[4]; | ||
253 | unsigned long rx_buf[4]; | ||
254 | struct mutex lock; | ||
255 | }; | ||
256 | |||
257 | int ab4500_write(struct ab4500 *ab4500, unsigned char block, | ||
258 | unsigned long addr, unsigned char data); | ||
259 | int ab4500_read(struct ab4500 *ab4500, unsigned char block, | ||
260 | unsigned long addr); | ||
261 | |||
262 | #endif /* MFD_AB4500_H */ | ||
diff --git a/include/linux/mfd/ab8500.h b/include/linux/mfd/ab8500.h new file mode 100644 index 000000000000..b63ff3ba3351 --- /dev/null +++ b/include/linux/mfd/ab8500.h | |||
@@ -0,0 +1,128 @@ | |||
1 | /* | ||
2 | * Copyright (C) ST-Ericsson SA 2010 | ||
3 | * | ||
4 | * License Terms: GNU General Public License v2 | ||
5 | * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | ||
6 | */ | ||
7 | #ifndef MFD_AB8500_H | ||
8 | #define MFD_AB8500_H | ||
9 | |||
10 | #include <linux/device.h> | ||
11 | |||
12 | /* | ||
13 | * Interrupts | ||
14 | */ | ||
15 | |||
16 | #define AB8500_INT_MAIN_EXT_CH_NOT_OK 0 | ||
17 | #define AB8500_INT_UN_PLUG_TV_DET 1 | ||
18 | #define AB8500_INT_PLUG_TV_DET 2 | ||
19 | #define AB8500_INT_TEMP_WARM 3 | ||
20 | #define AB8500_INT_PON_KEY2DB_F 4 | ||
21 | #define AB8500_INT_PON_KEY2DB_R 5 | ||
22 | #define AB8500_INT_PON_KEY1DB_F 6 | ||
23 | #define AB8500_INT_PON_KEY1DB_R 7 | ||
24 | #define AB8500_INT_BATT_OVV 8 | ||
25 | #define AB8500_INT_MAIN_CH_UNPLUG_DET 10 | ||
26 | #define AB8500_INT_MAIN_CH_PLUG_DET 11 | ||
27 | #define AB8500_INT_USB_ID_DET_F 12 | ||
28 | #define AB8500_INT_USB_ID_DET_R 13 | ||
29 | #define AB8500_INT_VBUS_DET_F 14 | ||
30 | #define AB8500_INT_VBUS_DET_R 15 | ||
31 | #define AB8500_INT_VBUS_CH_DROP_END 16 | ||
32 | #define AB8500_INT_RTC_60S 17 | ||
33 | #define AB8500_INT_RTC_ALARM 18 | ||
34 | #define AB8500_INT_BAT_CTRL_INDB 20 | ||
35 | #define AB8500_INT_CH_WD_EXP 21 | ||
36 | #define AB8500_INT_VBUS_OVV 22 | ||
37 | #define AB8500_INT_MAIN_CH_DROP_END 23 | ||
38 | #define AB8500_INT_CCN_CONV_ACC 24 | ||
39 | #define AB8500_INT_INT_AUD 25 | ||
40 | #define AB8500_INT_CCEOC 26 | ||
41 | #define AB8500_INT_CC_INT_CALIB 27 | ||
42 | #define AB8500_INT_LOW_BAT_F 28 | ||
43 | #define AB8500_INT_LOW_BAT_R 29 | ||
44 | #define AB8500_INT_BUP_CHG_NOT_OK 30 | ||
45 | #define AB8500_INT_BUP_CHG_OK 31 | ||
46 | #define AB8500_INT_GP_HW_ADC_CONV_END 32 | ||
47 | #define AB8500_INT_ACC_DETECT_1DB_F 33 | ||
48 | #define AB8500_INT_ACC_DETECT_1DB_R 34 | ||
49 | #define AB8500_INT_ACC_DETECT_22DB_F 35 | ||
50 | #define AB8500_INT_ACC_DETECT_22DB_R 36 | ||
51 | #define AB8500_INT_ACC_DETECT_21DB_F 37 | ||
52 | #define AB8500_INT_ACC_DETECT_21DB_R 38 | ||
53 | #define AB8500_INT_GP_SW_ADC_CONV_END 39 | ||
54 | #define AB8500_INT_BTEMP_LOW 72 | ||
55 | #define AB8500_INT_BTEMP_LOW_MEDIUM 73 | ||
56 | #define AB8500_INT_BTEMP_MEDIUM_HIGH 74 | ||
57 | #define AB8500_INT_BTEMP_HIGH 75 | ||
58 | #define AB8500_INT_USB_CHARGER_NOT_OK 81 | ||
59 | #define AB8500_INT_ID_WAKEUP_R 82 | ||
60 | #define AB8500_INT_ID_DET_R1R 84 | ||
61 | #define AB8500_INT_ID_DET_R2R 85 | ||
62 | #define AB8500_INT_ID_DET_R3R 86 | ||
63 | #define AB8500_INT_ID_DET_R4R 87 | ||
64 | #define AB8500_INT_ID_WAKEUP_F 88 | ||
65 | #define AB8500_INT_ID_DET_R1F 90 | ||
66 | #define AB8500_INT_ID_DET_R2F 91 | ||
67 | #define AB8500_INT_ID_DET_R3F 92 | ||
68 | #define AB8500_INT_ID_DET_R4F 93 | ||
69 | #define AB8500_INT_USB_CHG_DET_DONE 94 | ||
70 | #define AB8500_INT_USB_CH_TH_PROT_F 96 | ||
71 | #define AB8500_INT_USB_CH_TH_PROP_R 97 | ||
72 | #define AB8500_INT_MAIN_CH_TH_PROP_F 98 | ||
73 | #define AB8500_INT_MAIN_CH_TH_PROT_R 99 | ||
74 | #define AB8500_INT_USB_CHARGER_NOT_OKF 103 | ||
75 | |||
76 | #define AB8500_NR_IRQS 104 | ||
77 | #define AB8500_NUM_IRQ_REGS 13 | ||
78 | |||
79 | /** | ||
80 | * struct ab8500 - ab8500 internal structure | ||
81 | * @dev: parent device | ||
82 | * @lock: read/write operations lock | ||
83 | * @irq_lock: genirq bus lock | ||
84 | * @revision: chip revision | ||
85 | * @irq: irq line | ||
86 | * @write: register write | ||
87 | * @read: register read | ||
88 | * @rx_buf: rx buf for SPI | ||
89 | * @tx_buf: tx buf for SPI | ||
90 | * @mask: cache of IRQ regs for bus lock | ||
91 | * @oldmask: cache of previous IRQ regs for bus lock | ||
92 | */ | ||
93 | struct ab8500 { | ||
94 | struct device *dev; | ||
95 | struct mutex lock; | ||
96 | struct mutex irq_lock; | ||
97 | int revision; | ||
98 | int irq_base; | ||
99 | int irq; | ||
100 | |||
101 | int (*write) (struct ab8500 *a8500, u16 addr, u8 data); | ||
102 | int (*read) (struct ab8500 *a8500, u16 addr); | ||
103 | |||
104 | unsigned long tx_buf[4]; | ||
105 | unsigned long rx_buf[4]; | ||
106 | |||
107 | u8 mask[AB8500_NUM_IRQ_REGS]; | ||
108 | u8 oldmask[AB8500_NUM_IRQ_REGS]; | ||
109 | }; | ||
110 | |||
111 | /** | ||
112 | * struct ab8500_platform_data - AB8500 platform data | ||
113 | * @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used | ||
114 | * @init: board-specific initialization after detection of ab8500 | ||
115 | */ | ||
116 | struct ab8500_platform_data { | ||
117 | int irq_base; | ||
118 | void (*init) (struct ab8500 *); | ||
119 | }; | ||
120 | |||
121 | extern int ab8500_write(struct ab8500 *a8500, u16 addr, u8 data); | ||
122 | extern int ab8500_read(struct ab8500 *a8500, u16 addr); | ||
123 | extern int ab8500_set_bits(struct ab8500 *a8500, u16 addr, u8 mask, u8 data); | ||
124 | |||
125 | extern int __devinit ab8500_init(struct ab8500 *ab8500); | ||
126 | extern int __devexit ab8500_exit(struct ab8500 *ab8500); | ||
127 | |||
128 | #endif /* MFD_AB8500_H */ | ||