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authorChris Zankel <chris@zankel.net>2007-05-31 20:49:32 -0400
committerChris Zankel <chris@zankel.net>2007-05-31 20:49:32 -0400
commit29c4dfd92edc26c2cd2c0c64c9201d5b91d6418e (patch)
tree64b2884bb49a86f2895d9206b79bf9f64e384615 /include
parentadba09f01577ea441a761a85aacb1e43b58d35c4 (diff)
[XTENSA] Remove non-rt signal handling
The non-rt signal handling was never really used, so we don't break anything. This patch also cleans up the signal stack-frame to make it independent from the processor configuration. It also improves the method used for controlling single-stepping. We now save and restore the 'icountlevel' register that controls single stepping and set or clear the saved state to enable or disable it. Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'include')
-rw-r--r--include/asm-xtensa/coprocessor.h8
-rw-r--r--include/asm-xtensa/elf.h3
-rw-r--r--include/asm-xtensa/ptrace.h3
-rw-r--r--include/asm-xtensa/sigcontext.h24
-rw-r--r--include/asm-xtensa/unistd.h4
5 files changed, 16 insertions, 26 deletions
diff --git a/include/asm-xtensa/coprocessor.h b/include/asm-xtensa/coprocessor.h
index bd09ec02d57f..aa2121034558 100644
--- a/include/asm-xtensa/coprocessor.h
+++ b/include/asm-xtensa/coprocessor.h
@@ -64,6 +64,7 @@ typedef struct {
64# define COPROCESSOR_INFO_SIZE 8 64# define COPROCESSOR_INFO_SIZE 8
65# endif 65# endif
66#endif 66#endif
67#endif /* XCHAL_HAVE_CP */
67 68
68 69
69#ifndef __ASSEMBLY__ 70#ifndef __ASSEMBLY__
@@ -74,8 +75,11 @@ extern void save_coprocessor_registers(void*, int);
74# else 75# else
75# define release_coprocessors(task) 76# define release_coprocessors(task)
76# endif 77# endif
77#endif
78 78
79#endif 79typedef unsigned char cp_state_t[XTENSA_CP_EXTRA_SIZE]
80 __attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN)));
81
82#endif /* !__ASSEMBLY__ */
83
80 84
81#endif /* _XTENSA_COPROCESSOR_H */ 85#endif /* _XTENSA_COPROCESSOR_H */
diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h
index f0f9fd8560a5..1569b53cec91 100644
--- a/include/asm-xtensa/elf.h
+++ b/include/asm-xtensa/elf.h
@@ -13,7 +13,6 @@
13#ifndef _XTENSA_ELF_H 13#ifndef _XTENSA_ELF_H
14#define _XTENSA_ELF_H 14#define _XTENSA_ELF_H
15 15
16#include <asm/variant/core.h>
17#include <asm/ptrace.h> 16#include <asm/ptrace.h>
18 17
19/* Xtensa processor ELF architecture-magic number */ 18/* Xtensa processor ELF architecture-magic number */
@@ -49,7 +48,7 @@ typedef struct {
49 elf_greg_t lcount; 48 elf_greg_t lcount;
50 elf_greg_t sar; 49 elf_greg_t sar;
51 elf_greg_t syscall; 50 elf_greg_t syscall;
52 elf_greg_t ar[XCHAL_NUM_AREGS]; 51 elf_greg_t ar[64];
53} xtensa_gregset_t; 52} xtensa_gregset_t;
54 53
55#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t)) 54#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
diff --git a/include/asm-xtensa/ptrace.h b/include/asm-xtensa/ptrace.h
index cad83e814d69..77ff02d307bb 100644
--- a/include/asm-xtensa/ptrace.h
+++ b/include/asm-xtensa/ptrace.h
@@ -99,7 +99,8 @@ struct pt_regs {
99 unsigned long windowbase; /* 48 */ 99 unsigned long windowbase; /* 48 */
100 unsigned long windowstart; /* 52 */ 100 unsigned long windowstart; /* 52 */
101 unsigned long syscall; /* 56 */ 101 unsigned long syscall; /* 56 */
102 int reserved[2]; /* 64 */ 102 unsigned long icountlevel; /* 60 */
103 int reserved[1]; /* 64 */
103 104
104 /* Make sure the areg field is 16 bytes aligned. */ 105 /* Make sure the areg field is 16 bytes aligned. */
105 int align[0] __attribute__ ((aligned(16))); 106 int align[0] __attribute__ ((aligned(16)));
diff --git a/include/asm-xtensa/sigcontext.h b/include/asm-xtensa/sigcontext.h
index a75177291418..e3381cee5059 100644
--- a/include/asm-xtensa/sigcontext.h
+++ b/include/asm-xtensa/sigcontext.h
@@ -5,21 +5,12 @@
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details. 6 * for more details.
7 * 7 *
8 * Copyright (C) 2001 - 2003 Tensilica Inc. 8 * Copyright (C) 2001 - 2007 Tensilica Inc.
9 */ 9 */
10 10
11#ifndef _XTENSA_SIGCONTEXT_H 11#ifndef _XTENSA_SIGCONTEXT_H
12#define _XTENSA_SIGCONTEXT_H 12#define _XTENSA_SIGCONTEXT_H
13 13
14#define _ASMLANGUAGE
15#include <asm/processor.h>
16#include <asm/coprocessor.h>
17
18
19struct _cpstate {
20 unsigned char _cpstate[XTENSA_CP_EXTRA_SIZE];
21} __attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN)));
22
23 14
24struct sigcontext { 15struct sigcontext {
25 unsigned long oldmask; 16 unsigned long oldmask;
@@ -27,18 +18,13 @@ struct sigcontext {
27 /* CPU registers */ 18 /* CPU registers */
28 unsigned long sc_pc; 19 unsigned long sc_pc;
29 unsigned long sc_ps; 20 unsigned long sc_ps;
30 unsigned long sc_wmask;
31 unsigned long sc_windowbase;
32 unsigned long sc_windowstart;
33 unsigned long sc_lbeg; 21 unsigned long sc_lbeg;
34 unsigned long sc_lend; 22 unsigned long sc_lend;
35 unsigned long sc_lcount; 23 unsigned long sc_lcount;
36 unsigned long sc_sar; 24 unsigned long sc_sar;
37 unsigned long sc_depc; 25 unsigned long sc_acclo;
38 unsigned long sc_dareg0; 26 unsigned long sc_acchi;
39 unsigned long sc_treg[4]; 27 unsigned long sc_a[16];
40 unsigned long sc_areg[XCHAL_NUM_AREGS];
41 struct _cpstate *sc_cpstate;
42}; 28};
43 29
44#endif /* __ASM_XTENSA_SIGCONTEXT_H */ 30#endif /* _XTENSA_SIGCONTEXT_H */
diff --git a/include/asm-xtensa/unistd.h b/include/asm-xtensa/unistd.h
index 8a7fb6964ce1..9bd34024431c 100644
--- a/include/asm-xtensa/unistd.h
+++ b/include/asm-xtensa/unistd.h
@@ -485,8 +485,8 @@ __SYSCALL(217, sys_sched_get_priority_min, 1)
485__SYSCALL(218, sys_sched_rr_get_interval, 2) 485__SYSCALL(218, sys_sched_rr_get_interval, 2)
486#define __NR_sched_yield 219 486#define __NR_sched_yield 219
487__SYSCALL(219, sys_sched_yield, 0) 487__SYSCALL(219, sys_sched_yield, 0)
488#define __NR_sigreturn 222 488#define __NR_available222 222
489__SYSCALL(222, xtensa_sigreturn, 0) 489__SYSCALL(222, sys_ni_syscall, 0)
490 490
491/* Signal Handling */ 491/* Signal Handling */
492 492