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authorShaohua Li <shaohua.li@intel.com>2008-07-22 22:32:31 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2008-07-28 17:56:57 -0400
commit149e16372a2066c5474d8a8db9b252afd57eb427 (patch)
tree075a46f0672739fdab18d2f1e5f06080160de8b0 /include
parent5fde244d39b88625ac578d83e6625138714de031 (diff)
PCI: disable ASPM on pre-1.1 PCIe devices
Disable ASPM on pre-1.1 PCIe devices, as many of them don't implement it correctly. Tested-by: Jack Howarth <howarth@bromo.msbb.uc.edu> Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/pci_regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index 19958b929905..450684f7eaac 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -374,6 +374,7 @@
374#define PCI_EXP_DEVCAP_ATN_BUT 0x1000 /* Attention Button Present */ 374#define PCI_EXP_DEVCAP_ATN_BUT 0x1000 /* Attention Button Present */
375#define PCI_EXP_DEVCAP_ATN_IND 0x2000 /* Attention Indicator Present */ 375#define PCI_EXP_DEVCAP_ATN_IND 0x2000 /* Attention Indicator Present */
376#define PCI_EXP_DEVCAP_PWR_IND 0x4000 /* Power Indicator Present */ 376#define PCI_EXP_DEVCAP_PWR_IND 0x4000 /* Power Indicator Present */
377#define PCI_EXP_DEVCAP_RBER 0x8000 /* Role-Based Error Reporting */
377#define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */ 378#define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */
378#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */ 379#define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */
379#define PCI_EXP_DEVCTL 8 /* Device Control */ 380#define PCI_EXP_DEVCTL 8 /* Device Control */