Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/spi-2.6

* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/spi-2.6:
  [PATCH] SPI: spi_bitbang: clocking fixes
  [PATCH] spi: Update to PXA2xx SPI Driver
  [PATCH] SPI: busnum == 0 needs to work
  [PATCH] SPI: devices can require LSB-first encodings
  [PATCH] SPI: Renamed bitbang_transfer_setup to spi_bitbang_setup_transfer and export it
  [PATCH] SPI: Add David as the SPI subsystem maintainer
  [PATCH] SPI: spi bounce buffer has a minimum length
  [PATCH] SPI: spi whitespace fixes
  [PATCH] SPI: add PXA2xx SSP SPI Driver
  [PATCH] SPI: per-transfer overrides for wordsize and clocking

3 files changed, 104 insertions, 17 deletions

diff --git a/include/asm-arm/arch-pxa/pxa2xx_spi.h b/include/asm-arm/arch-pxa/pxa2xx_spi.h
new file mode 100644
index 000000000000..1e70908b816f
--- /dev/null
+++ b/include/asm-arm/arch-pxa/pxa2xx_spi.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef PXA2XX_SPI_H_
+#define PXA2XX_SPI_H_
+
+#define PXA2XX_CS_ASSERT (0x01)
+#define PXA2XX_CS_DEASSERT (0x02)
+
+#if defined(CONFIG_PXA25x)
+#define CLOCK_SPEED_HZ 3686400
+#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00)
+#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
+#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
+#elif defined(CONFIG_PXA27x)
+#define CLOCK_SPEED_HZ 13000000
+#define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
+#define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
+#define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00)
+#endif
+
+#define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1)))))
+#define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2)))))
+#define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3)))))
+
+enum pxa_ssp_type {
+        SSP_UNDEFINED = 0,
+        PXA25x_SSP,  /* pxa 210, 250, 255, 26x */
+        PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
+        PXA27x_SSP,
+};
+
+/* device.platform_data for SSP controller devices */
+struct pxa2xx_spi_master {
+        enum pxa_ssp_type ssp_type;
+        u32 clock_enable;
+        u16 num_chipselect;
+        u8 enable_dma;
+};
+
+/* spi_board_info.controller_data for SPI slave devices,
+ * copied to spi_device.platform_data ... mostly for dma tuning
+ */
+struct pxa2xx_spi_chip {
+        u8 tx_threshold;
+        u8 rx_threshold;
+        u8 dma_burst_size;
+        u32 timeout_microsecs;
+        u8 enable_loopback;
+        void (*cs_control)(u32 command);
+};
+
+#endif /*PXA2XX_SPI_H_*/
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index b05f1463a267..e928c0dcc297 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -31,18 +31,23 @@ extern struct bus_type spi_bus_type;
  * @master: SPI controller used with the device.
  * @max_speed_hz: Maximum clock rate to be used with this chip
  *      (on this board); may be changed by the device's driver.
+ *      The spi_transfer.speed_hz can override this for each transfer.
  * @chip-select: Chipselect, distinguishing chips handled by "master".
  * @mode: The spi mode defines how data is clocked out and in.
  *      This may be changed by the device's driver.
+ *      The "active low" default for chipselect mode can be overridden,
+ *      as can the "MSB first" default for each word in a transfer.
  * @bits_per_word: Data transfers involve one or more words; word sizes
- *      like eight or 12 bits are common.  In-memory wordsizes are
+ *      like eight or 12 bits are common.  In-memory wordsizes are
  *      powers of two bytes (e.g. 20 bit samples use 32 bits).
- *      This may be changed by the device's driver.
+ *      This may be changed by the device's driver, or left at the
+ *      default (0) indicating protocol words are eight bit bytes.
+ *      The spi_transfer.bits_per_word can override this for each transfer.
  * @irq: Negative, or the number passed to request_irq() to receive
- *      interrupts from this device.
+ *      interrupts from this device.
  * @controller_state: Controller's runtime state
  * @controller_data: Board-specific definitions for controller, such as
- *      FIFO initialization parameters; from board_info.controller_data
+ *      FIFO initialization parameters; from board_info.controller_data
  *
  * An spi_device is used to interchange data between an SPI slave
  * (usually a discrete chip) and CPU memory.
@@ -65,6 +70,7 @@ struct spi_device {
 #define SPI_MODE_2      (SPI_CPOL|0)
 #define SPI_MODE_3      (SPI_CPOL|SPI_CPHA)
 #define SPI_CS_HIGH     0x04                    /* chipselect active high? */
+#define SPI_LSB_FIRST   0x08                    /* per-word bits-on-wire */
         u8                      bits_per_word;
         int                     irq;
         void                    *controller_state;
@@ -73,7 +79,6 @@ struct spi_device {
 
         // likely need more hooks for more protocol options affecting how
         // the controller talks to each chip, like:
-        //  - bit order (default is wordwise msb-first)
         //  - memory packing (12 bit samples into low bits, others zeroed)
         //  - priority
         //  - drop chipselect after each word
@@ -143,13 +148,13 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
  * struct spi_master - interface to SPI master controller
  * @cdev: class interface to this driver
  * @bus_num: board-specific (and often SOC-specific) identifier for a
- *      given SPI controller.
+ *      given SPI controller.
  * @num_chipselect: chipselects are used to distinguish individual
- *      SPI slaves, and are numbered from zero to num_chipselects.
- *      each slave has a chipselect signal, but it's common that not
- *      every chipselect is connected to a slave.
+ *      SPI slaves, and are numbered from zero to num_chipselects.
+ *      each slave has a chipselect signal, but it's common that not
+ *      every chipselect is connected to a slave.
  * @setup: updates the device mode and clocking records used by a
- *      device's SPI controller; protocol code may call this.
+ *      device's SPI controller; protocol code may call this.
  * @transfer: adds a message to the controller's transfer queue.
  * @cleanup: frees controller-specific state
  *
@@ -167,13 +172,13 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
 struct spi_master {
         struct class_device     cdev;
 
-        /* other than zero (== assign one dynamically), bus_num is fully
+        /* other than negative (== assign one dynamically), bus_num is fully
          * board-specific.  usually that simplifies to being SOC-specific.
-         * example:  one SOC has three SPI controllers, numbered 1..3,
+         * example:  one SOC has three SPI controllers, numbered 0..2,
          * and one board's schematics might show it using SPI-2.  software
          * would normally use bus_num=2 for that controller.
          */
-        u16                     bus_num;
+        s16                     bus_num;
 
         /* chipselects will be integral to many controllers; some others
          * might use board-specific GPIOs.
@@ -268,10 +273,14 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
  * @tx_dma: DMA address of tx_buf, if spi_message.is_dma_mapped
  * @rx_dma: DMA address of rx_buf, if spi_message.is_dma_mapped
  * @len: size of rx and tx buffers (in bytes)
+ * @speed_hz: Select a speed other then the device default for this
+ *      transfer. If 0 the default (from spi_device) is used.
+ * @bits_per_word: select a bits_per_word other then the device default
+ *      for this transfer. If 0 the default (from spi_device) is used.
  * @cs_change: affects chipselect after this transfer completes
  * @delay_usecs: microseconds to delay after this transfer before
- *      (optionally) changing the chipselect status, then starting
- *      the next transfer or completing this spi_message.
+ *      (optionally) changing the chipselect status, then starting
+ *      the next transfer or completing this spi_message.
  * @transfer_list: transfers are sequenced through spi_message.transfers
  *
  * SPI transfers always write the same number of bytes as they read.
@@ -322,7 +331,9 @@ struct spi_transfer {
         dma_addr_t      rx_dma;
 
         unsigned        cs_change:1;
+        u8              bits_per_word;
         u16             delay_usecs;
+        u32             speed_hz;
 
         struct list_head transfer_list;
 };
@@ -356,7 +367,7 @@ struct spi_transfer {
  * and its transfers, ignore them until its completion callback.
  */
 struct spi_message {
-        struct list_head        transfers;
+        struct list_head        transfers;
 
         struct spi_device       *spi;
 
@@ -374,7 +385,7 @@ struct spi_message {
          */
 
         /* completion is reported through a callback */
-        void                    (*complete)(void *context);
+        void                    (*complete)(void *context);
         void                    *context;
         unsigned                actual_length;
         int                     status;
diff --git a/include/linux/spi/spi_bitbang.h b/include/linux/spi/spi_bitbang.h
index c961fe9bf3eb..16ce178f54d7 100644
--- a/include/linux/spi/spi_bitbang.h
+++ b/include/linux/spi/spi_bitbang.h
@@ -30,6 +30,12 @@ struct spi_bitbang {
 
         struct spi_master       *master;
 
+        /* setup_transfer() changes clock and/or wordsize to match settings
+         * for this transfer; zeroes restore defaults from spi_device.
+         */
+        int     (*setup_transfer)(struct spi_device *spi,
+                        struct spi_transfer *t);
+
         void    (*chipselect)(struct spi_device *spi, int is_on);
 #define BITBANG_CS_ACTIVE       1       /* normally nCS, active low */
 #define BITBANG_CS_INACTIVE     0
@@ -51,6 +57,8 @@ struct spi_bitbang {
 extern int spi_bitbang_setup(struct spi_device *spi);
 extern void spi_bitbang_cleanup(const struct spi_device *spi);
 extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m);
+extern int spi_bitbang_setup_transfer(struct spi_device *spi,
+                                      struct spi_transfer *t);
 
 /* start or stop queue processing */
 extern int spi_bitbang_start(struct spi_bitbang *spi);