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authorPavankumar Kondeti <pkondeti@codeaurora.org>2010-12-07 07:23:58 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2010-12-10 17:23:32 -0500
commit87c0104af742af2acfcbd685f2b9a40f33770dc0 (patch)
treef17e999013e443ec70bb4c05a79a44c6ae52054f /include
parent8bb6a164b906bb7ca319202f85b30e3ef096cd65 (diff)
USB: OTG: msm: Add support for power management
Implement runtime and system pm ops to put hardware into low power mode (LPM). As part of LPM, USB clocks are turned off, PHY is put into suspend state and PHY comparators are turned off if VBUS/Id notifications are not required from PHY. Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include')
-rw-r--r--include/linux/usb/msm_hsusb.h4
-rw-r--r--include/linux/usb/msm_hsusb_hw.h3
2 files changed, 7 insertions, 0 deletions
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
index b796df94ec72..3675e03b1539 100644
--- a/include/linux/usb/msm_hsusb.h
+++ b/include/linux/usb/msm_hsusb.h
@@ -88,6 +88,8 @@ struct msm_otg_platform_data {
88 * @regs: ioremapped register base address. 88 * @regs: ioremapped register base address.
89 * @inputs: OTG state machine inputs(Id, SessValid etc). 89 * @inputs: OTG state machine inputs(Id, SessValid etc).
90 * @sm_work: OTG state machine work. 90 * @sm_work: OTG state machine work.
91 * @in_lpm: indicates low power mode (LPM) state.
92 * @async_int: Async interrupt arrived.
91 * 93 *
92 */ 94 */
93struct msm_otg { 95struct msm_otg {
@@ -103,6 +105,8 @@ struct msm_otg {
103#define B_SESS_VLD 1 105#define B_SESS_VLD 1
104 unsigned long inputs; 106 unsigned long inputs;
105 struct work_struct sm_work; 107 struct work_struct sm_work;
108 atomic_t in_lpm;
109 int async_int;
106}; 110};
107 111
108#endif 112#endif
diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index b061cffcf048..b92e17349c7b 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ b/include/linux/usb/msm_hsusb_hw.h
@@ -44,6 +44,9 @@
44#define ULPI_DATA(n) ((n) & 255) 44#define ULPI_DATA(n) ((n) & 255)
45#define ULPI_DATA_READ(n) (((n) >> 8) & 255) 45#define ULPI_DATA_READ(n) (((n) >> 8) & 255)
46 46
47#define ASYNC_INTR_CTRL (1 << 29) /* Enable async interrupt */
48#define ULPI_STP_CTRL (1 << 30) /* Block communication with PHY */
49
47/* OTG definitions */ 50/* OTG definitions */
48#define OTGSC_INTSTS_MASK (0x7f << 16) 51#define OTGSC_INTSTS_MASK (0x7f << 16)
49#define OTGSC_ID (1 << 8) 52#define OTGSC_ID (1 << 8)