x86: prevent unconditional writes to DebugCtl MSR

Otherwise, enabling (or better, subsequent disabling) of single
stepping would cause a kernel oops on CPUs not having this MSR.

The patch could have been added a conditional to the MSR write in
user_disable_single_step(), but centralizing the updates seems safer
and (looking forward) better manageable.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Markus Metzger <markus.t.metzger@intel.com>

Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 9 insertions, 0 deletions

diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index cc0268395ea2..40227c9bf51b 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -741,6 +741,15 @@ extern void switch_to_new_gdt(void);
 extern void cpu_init(void);
 extern void init_gdt(int cpu);
 
+static inline void update_debugctlmsr(unsigned long debugctlmsr)
+{
+#ifndef CONFIG_X86_DEBUGCTLMSR
+        if (boot_cpu_data.x86 < 6)
+                return;
+#endif
+        wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
+}
+
 /*
  * from system description table in BIOS. Mostly for MCA use, but
  * others may find it useful: