diff options
author | Kyungmin Park <kyungmin.park@samsung.com> | 2007-06-30 00:57:49 -0400 |
---|---|---|
committer | David Woodhouse <dwmw2@infradead.org> | 2007-06-30 03:24:57 -0400 |
commit | ee9745fcf214272b7cdd9d320d044cf433ee958e (patch) | |
tree | 340cbf42788ea9ea9f504eeb80efc12c5d1c11ed /include | |
parent | 1bddb9a8ba30dffa963c76283bc482b67fb90d8a (diff) |
[MTD] [OneNAND] 2X program support
The 2X Program is an extension of Program Operation.
Since the device is equipped with two DataRAMs, and two-plane NAND Flash
memory array, these two component enables simultaneous program of 4KiB.
Plane1 has only even blocks such as block0, block2, block4 while Plane2
has only odd blocks such as block1, block3, block5.
So MTD regards it as 4KiB page size and 256KiB block size
Now the following chips support it. (KFXXX16Q2M)
Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M,
Mux: KFM2G16Q2M, KFN4G16Q2M,
And more recent chips
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mtd/onenand.h | 12 | ||||
-rw-r--r-- | include/linux/mtd/onenand_regs.h | 4 |
2 files changed, 16 insertions, 0 deletions
diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index a56d24ada505..fd0a260e070b 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h | |||
@@ -60,6 +60,7 @@ struct onenand_bufferram { | |||
60 | * @erase_shift: [INTERN] number of address bits in a block | 60 | * @erase_shift: [INTERN] number of address bits in a block |
61 | * @page_shift: [INTERN] number of address bits in a page | 61 | * @page_shift: [INTERN] number of address bits in a page |
62 | * @page_mask: [INTERN] a page per block mask | 62 | * @page_mask: [INTERN] a page per block mask |
63 | * @writesize: [INTERN] a real page size | ||
63 | * @bufferram_index: [INTERN] BufferRAM index | 64 | * @bufferram_index: [INTERN] BufferRAM index |
64 | * @bufferram: [INTERN] BufferRAM info | 65 | * @bufferram: [INTERN] BufferRAM info |
65 | * @readw: [REPLACEABLE] hardware specific function for read short | 66 | * @readw: [REPLACEABLE] hardware specific function for read short |
@@ -100,6 +101,7 @@ struct onenand_chip { | |||
100 | unsigned int erase_shift; | 101 | unsigned int erase_shift; |
101 | unsigned int page_shift; | 102 | unsigned int page_shift; |
102 | unsigned int page_mask; | 103 | unsigned int page_mask; |
104 | unsigned int writesize; | ||
103 | 105 | ||
104 | unsigned int bufferram_index; | 106 | unsigned int bufferram_index; |
105 | struct onenand_bufferram bufferram[MAX_BUFFERRAM]; | 107 | struct onenand_bufferram bufferram[MAX_BUFFERRAM]; |
@@ -140,6 +142,8 @@ struct onenand_chip { | |||
140 | #define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) | 142 | #define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) |
141 | #define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) | 143 | #define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) |
142 | #define ONENAND_SET_PREV_BUFFERRAM(this) (this->bufferram_index ^= 1) | 144 | #define ONENAND_SET_PREV_BUFFERRAM(this) (this->bufferram_index ^= 1) |
145 | #define ONENAND_SET_BUFFERRAM0(this) (this->bufferram_index = 0) | ||
146 | #define ONENAND_SET_BUFFERRAM1(this) (this->bufferram_index = 1) | ||
143 | 147 | ||
144 | #define ONENAND_GET_SYS_CFG1(this) \ | 148 | #define ONENAND_GET_SYS_CFG1(this) \ |
145 | (this->read_word(this->base + ONENAND_REG_SYS_CFG1)) | 149 | (this->read_word(this->base + ONENAND_REG_SYS_CFG1)) |
@@ -149,6 +153,13 @@ struct onenand_chip { | |||
149 | #define ONENAND_IS_DDP(this) \ | 153 | #define ONENAND_IS_DDP(this) \ |
150 | (this->device_id & ONENAND_DEVICE_IS_DDP) | 154 | (this->device_id & ONENAND_DEVICE_IS_DDP) |
151 | 155 | ||
156 | #ifdef CONFIG_MTD_ONENAND_2X_PROGRAM | ||
157 | #define ONENAND_IS_2PLANE(this) \ | ||
158 | (this->options & ONENAND_HAS_2PLANE) | ||
159 | #else | ||
160 | #define ONENAND_IS_2PLANE(this) (0) | ||
161 | #endif | ||
162 | |||
152 | /* Check byte access in OneNAND */ | 163 | /* Check byte access in OneNAND */ |
153 | #define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1) | 164 | #define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1) |
154 | 165 | ||
@@ -157,6 +168,7 @@ struct onenand_chip { | |||
157 | */ | 168 | */ |
158 | #define ONENAND_HAS_CONT_LOCK (0x0001) | 169 | #define ONENAND_HAS_CONT_LOCK (0x0001) |
159 | #define ONENAND_HAS_UNLOCK_ALL (0x0002) | 170 | #define ONENAND_HAS_UNLOCK_ALL (0x0002) |
171 | #define ONENAND_HAS_2PLANE (0x0004) | ||
160 | #define ONENAND_PAGEBUF_ALLOC (0x1000) | 172 | #define ONENAND_PAGEBUF_ALLOC (0x1000) |
161 | #define ONENAND_OOBBUF_ALLOC (0x2000) | 173 | #define ONENAND_OOBBUF_ALLOC (0x2000) |
162 | 174 | ||
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h index af94719890e7..c46161f4eee3 100644 --- a/include/linux/mtd/onenand_regs.h +++ b/include/linux/mtd/onenand_regs.h | |||
@@ -74,6 +74,8 @@ | |||
74 | 74 | ||
75 | #define ONENAND_DEVICE_DENSITY_512Mb (0x002) | 75 | #define ONENAND_DEVICE_DENSITY_512Mb (0x002) |
76 | #define ONENAND_DEVICE_DENSITY_1Gb (0x003) | 76 | #define ONENAND_DEVICE_DENSITY_1Gb (0x003) |
77 | #define ONENAND_DEVICE_DENSITY_2Gb (0x004) | ||
78 | #define ONENAND_DEVICE_DENSITY_4Gb (0x005) | ||
77 | 79 | ||
78 | /* | 80 | /* |
79 | * Version ID Register F002h (R) | 81 | * Version ID Register F002h (R) |
@@ -111,6 +113,8 @@ | |||
111 | #define ONENAND_CMD_READOOB (0x13) | 113 | #define ONENAND_CMD_READOOB (0x13) |
112 | #define ONENAND_CMD_PROG (0x80) | 114 | #define ONENAND_CMD_PROG (0x80) |
113 | #define ONENAND_CMD_PROGOOB (0x1A) | 115 | #define ONENAND_CMD_PROGOOB (0x1A) |
116 | #define ONENAND_CMD_2X_PROG (0x7D) | ||
117 | #define ONENAND_CMD_2X_CACHE_PROG (0x7F) | ||
114 | #define ONENAND_CMD_UNLOCK (0x23) | 118 | #define ONENAND_CMD_UNLOCK (0x23) |
115 | #define ONENAND_CMD_LOCK (0x2A) | 119 | #define ONENAND_CMD_LOCK (0x2A) |
116 | #define ONENAND_CMD_LOCK_TIGHT (0x2C) | 120 | #define ONENAND_CMD_LOCK_TIGHT (0x2C) |