diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-30 18:04:13 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-30 18:04:13 -0500 |
commit | ce362c009250340358a7221f3cdb7954cbf19c01 (patch) | |
tree | 38b4700e51d3cce214690e7882069e0e12abf8d4 /include | |
parent | 064c94f9da8845f12446ab37142aa10f3c6f66ac (diff) | |
parent | cd7a9202a5a6e7712df2b80ed5ebd7b078130fc3 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6: (24 commits)
[PARISC] Fix double free when removing HIL drivers
[PARISC] Add atomic_sub_and_test
[PARISC] Enabled some NLS modules in a500, b180 and c3000 defconfigs
[PARISC] Kill duplicated EXPORT_SYMBOL warnings
[PARISC] Move ioremap EXPORT_SYMBOL from parisc_ksyms.c
[PARISC] Make local_t use atomic_long_t
[PARISC] Update defconfigs
[PARISC] Add PREEMPT support
[PARISC] More useful readwrite lock helpers
[PARISC] Convert HIL drivers to use input_allocate_device
[PARISC] Fixup CONFIG_EISA a bit
[PARISC] getsockopt should be ENTRY_COMP
[PARISC] Remove obsolete CONFIG_DEBUG_IOREMAP
[PARISC] Temporary FIXME for ioremapping EISA regions
[PARISC] Enable ioremap functionality unconditionally
[PARISC] Fix stifb with IOREMAP and a 64-bit kernel
[PARISC] Add CONFIG_HPPA_IOREMAP to conditionally enable ioremap
[PARISC] Add STRICT_MM_TYPECHECKS
[PARISC] Fix IOREMAP with a 64-bit kernel
[PARISC] Add parisc implementation of flush_kernel_dcache_page()
...
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-parisc/atomic.h | 3 | ||||
-rw-r--r-- | include/asm-parisc/cache.h | 2 | ||||
-rw-r--r-- | include/asm-parisc/cacheflush.h | 17 | ||||
-rw-r--r-- | include/asm-parisc/io.h | 95 | ||||
-rw-r--r-- | include/asm-parisc/local.h | 16 | ||||
-rw-r--r-- | include/asm-parisc/page.h | 58 | ||||
-rw-r--r-- | include/asm-parisc/pci.h | 5 | ||||
-rw-r--r-- | include/asm-parisc/pdc_chassis.h | 5 | ||||
-rw-r--r-- | include/asm-parisc/spinlock.h | 16 | ||||
-rw-r--r-- | include/asm-parisc/thread_info.h | 3 |
10 files changed, 90 insertions, 130 deletions
diff --git a/include/asm-parisc/atomic.h b/include/asm-parisc/atomic.h index 4dc7253ff5d0..403ea97316cf 100644 --- a/include/asm-parisc/atomic.h +++ b/include/asm-parisc/atomic.h | |||
@@ -210,6 +210,8 @@ static __inline__ int atomic_read(const atomic_t *v) | |||
210 | 210 | ||
211 | #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) | 211 | #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) |
212 | 212 | ||
213 | #define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0) | ||
214 | |||
213 | #define ATOMIC_INIT(i) ((atomic_t) { (i) }) | 215 | #define ATOMIC_INIT(i) ((atomic_t) { (i) }) |
214 | 216 | ||
215 | #define smp_mb__before_atomic_dec() smp_mb() | 217 | #define smp_mb__before_atomic_dec() smp_mb() |
@@ -267,6 +269,7 @@ atomic64_read(const atomic64_t *v) | |||
267 | 269 | ||
268 | #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) | 270 | #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) |
269 | #define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0) | 271 | #define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0) |
272 | #define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0) | ||
270 | 273 | ||
271 | #endif /* __LP64__ */ | 274 | #endif /* __LP64__ */ |
272 | 275 | ||
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h index ae50f8e12eed..c831665473cb 100644 --- a/include/asm-parisc/cache.h +++ b/include/asm-parisc/cache.h | |||
@@ -48,7 +48,7 @@ extern void flush_user_icache_range_asm(unsigned long, unsigned long); | |||
48 | extern void flush_kernel_icache_range_asm(unsigned long, unsigned long); | 48 | extern void flush_kernel_icache_range_asm(unsigned long, unsigned long); |
49 | extern void flush_user_dcache_range_asm(unsigned long, unsigned long); | 49 | extern void flush_user_dcache_range_asm(unsigned long, unsigned long); |
50 | extern void flush_kernel_dcache_range_asm(unsigned long, unsigned long); | 50 | extern void flush_kernel_dcache_range_asm(unsigned long, unsigned long); |
51 | extern void flush_kernel_dcache_page(void *); | 51 | extern void flush_kernel_dcache_page_asm(void *); |
52 | extern void flush_kernel_icache_page(void *); | 52 | extern void flush_kernel_icache_page(void *); |
53 | extern void disable_sr_hashing(void); /* turns off space register hashing */ | 53 | extern void disable_sr_hashing(void); /* turns off space register hashing */ |
54 | extern void disable_sr_hashing_asm(int); /* low level support for above */ | 54 | extern void disable_sr_hashing_asm(int); /* low level support for above */ |
diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h index c53af9ff41b5..76b6b7d6046a 100644 --- a/include/asm-parisc/cacheflush.h +++ b/include/asm-parisc/cacheflush.h | |||
@@ -62,7 +62,7 @@ extern void flush_dcache_page(struct page *page); | |||
62 | #define flush_dcache_mmap_unlock(mapping) \ | 62 | #define flush_dcache_mmap_unlock(mapping) \ |
63 | write_unlock_irq(&(mapping)->tree_lock) | 63 | write_unlock_irq(&(mapping)->tree_lock) |
64 | 64 | ||
65 | #define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page_address(page)); flush_kernel_icache_page(page_address(page)); } while (0) | 65 | #define flush_icache_page(vma,page) do { flush_kernel_dcache_page(page); flush_kernel_icache_page(page_address(page)); } while (0) |
66 | 66 | ||
67 | #define flush_icache_range(s,e) do { flush_kernel_dcache_range_asm(s,e); flush_kernel_icache_range_asm(s,e); } while (0) | 67 | #define flush_icache_range(s,e) do { flush_kernel_dcache_range_asm(s,e); flush_kernel_icache_range_asm(s,e); } while (0) |
68 | 68 | ||
@@ -184,6 +184,21 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long | |||
184 | 184 | ||
185 | } | 185 | } |
186 | 186 | ||
187 | static inline void | ||
188 | flush_anon_page(struct page *page, unsigned long vmaddr) | ||
189 | { | ||
190 | if (PageAnon(page)) | ||
191 | flush_user_dcache_page(vmaddr); | ||
192 | } | ||
193 | #define ARCH_HAS_FLUSH_ANON_PAGE | ||
194 | |||
195 | static inline void | ||
196 | flush_kernel_dcache_page(struct page *page) | ||
197 | { | ||
198 | flush_kernel_dcache_page_asm(page_address(page)); | ||
199 | } | ||
200 | #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE | ||
201 | |||
187 | #ifdef CONFIG_DEBUG_RODATA | 202 | #ifdef CONFIG_DEBUG_RODATA |
188 | void mark_rodata_ro(void); | 203 | void mark_rodata_ro(void); |
189 | #endif | 204 | #endif |
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h index be0c7234a6da..29da31194b91 100644 --- a/include/asm-parisc/io.h +++ b/include/asm-parisc/io.h | |||
@@ -25,35 +25,11 @@ extern unsigned long parisc_vmerge_max_size; | |||
25 | * eg dev->hpa or 0xfee00000. | 25 | * eg dev->hpa or 0xfee00000. |
26 | */ | 26 | */ |
27 | 27 | ||
28 | #ifdef CONFIG_DEBUG_IOREMAP | ||
29 | #ifdef CONFIG_64BIT | ||
30 | #define NYBBLE_SHIFT 60 | ||
31 | #else | ||
32 | #define NYBBLE_SHIFT 28 | ||
33 | #endif | ||
34 | extern void gsc_bad_addr(unsigned long addr); | ||
35 | extern void __raw_bad_addr(const volatile void __iomem *addr); | ||
36 | #define gsc_check_addr(addr) \ | ||
37 | if ((addr >> NYBBLE_SHIFT) != 0xf) { \ | ||
38 | gsc_bad_addr(addr); \ | ||
39 | addr |= 0xfUL << NYBBLE_SHIFT; \ | ||
40 | } | ||
41 | #define __raw_check_addr(addr) \ | ||
42 | if (((unsigned long)addr >> NYBBLE_SHIFT) != 0xe) \ | ||
43 | __raw_bad_addr(addr); \ | ||
44 | addr = (void __iomem *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT)); | ||
45 | #else | ||
46 | #define gsc_check_addr(addr) | ||
47 | #define __raw_check_addr(addr) | ||
48 | #endif | ||
49 | |||
50 | static inline unsigned char gsc_readb(unsigned long addr) | 28 | static inline unsigned char gsc_readb(unsigned long addr) |
51 | { | 29 | { |
52 | long flags; | 30 | long flags; |
53 | unsigned char ret; | 31 | unsigned char ret; |
54 | 32 | ||
55 | gsc_check_addr(addr); | ||
56 | |||
57 | __asm__ __volatile__( | 33 | __asm__ __volatile__( |
58 | " rsm 2,%0\n" | 34 | " rsm 2,%0\n" |
59 | " ldbx 0(%2),%1\n" | 35 | " ldbx 0(%2),%1\n" |
@@ -68,8 +44,6 @@ static inline unsigned short gsc_readw(unsigned long addr) | |||
68 | long flags; | 44 | long flags; |
69 | unsigned short ret; | 45 | unsigned short ret; |
70 | 46 | ||
71 | gsc_check_addr(addr); | ||
72 | |||
73 | __asm__ __volatile__( | 47 | __asm__ __volatile__( |
74 | " rsm 2,%0\n" | 48 | " rsm 2,%0\n" |
75 | " ldhx 0(%2),%1\n" | 49 | " ldhx 0(%2),%1\n" |
@@ -83,8 +57,6 @@ static inline unsigned int gsc_readl(unsigned long addr) | |||
83 | { | 57 | { |
84 | u32 ret; | 58 | u32 ret; |
85 | 59 | ||
86 | gsc_check_addr(addr); | ||
87 | |||
88 | __asm__ __volatile__( | 60 | __asm__ __volatile__( |
89 | " ldwax 0(%1),%0\n" | 61 | " ldwax 0(%1),%0\n" |
90 | : "=r" (ret) : "r" (addr) ); | 62 | : "=r" (ret) : "r" (addr) ); |
@@ -95,7 +67,6 @@ static inline unsigned int gsc_readl(unsigned long addr) | |||
95 | static inline unsigned long long gsc_readq(unsigned long addr) | 67 | static inline unsigned long long gsc_readq(unsigned long addr) |
96 | { | 68 | { |
97 | unsigned long long ret; | 69 | unsigned long long ret; |
98 | gsc_check_addr(addr); | ||
99 | 70 | ||
100 | #ifdef __LP64__ | 71 | #ifdef __LP64__ |
101 | __asm__ __volatile__( | 72 | __asm__ __volatile__( |
@@ -112,8 +83,6 @@ static inline unsigned long long gsc_readq(unsigned long addr) | |||
112 | static inline void gsc_writeb(unsigned char val, unsigned long addr) | 83 | static inline void gsc_writeb(unsigned char val, unsigned long addr) |
113 | { | 84 | { |
114 | long flags; | 85 | long flags; |
115 | gsc_check_addr(addr); | ||
116 | |||
117 | __asm__ __volatile__( | 86 | __asm__ __volatile__( |
118 | " rsm 2,%0\n" | 87 | " rsm 2,%0\n" |
119 | " stbs %1,0(%2)\n" | 88 | " stbs %1,0(%2)\n" |
@@ -124,8 +93,6 @@ static inline void gsc_writeb(unsigned char val, unsigned long addr) | |||
124 | static inline void gsc_writew(unsigned short val, unsigned long addr) | 93 | static inline void gsc_writew(unsigned short val, unsigned long addr) |
125 | { | 94 | { |
126 | long flags; | 95 | long flags; |
127 | gsc_check_addr(addr); | ||
128 | |||
129 | __asm__ __volatile__( | 96 | __asm__ __volatile__( |
130 | " rsm 2,%0\n" | 97 | " rsm 2,%0\n" |
131 | " sths %1,0(%2)\n" | 98 | " sths %1,0(%2)\n" |
@@ -135,8 +102,6 @@ static inline void gsc_writew(unsigned short val, unsigned long addr) | |||
135 | 102 | ||
136 | static inline void gsc_writel(unsigned int val, unsigned long addr) | 103 | static inline void gsc_writel(unsigned int val, unsigned long addr) |
137 | { | 104 | { |
138 | gsc_check_addr(addr); | ||
139 | |||
140 | __asm__ __volatile__( | 105 | __asm__ __volatile__( |
141 | " stwas %0,0(%1)\n" | 106 | " stwas %0,0(%1)\n" |
142 | : : "r" (val), "r" (addr) ); | 107 | : : "r" (val), "r" (addr) ); |
@@ -144,8 +109,6 @@ static inline void gsc_writel(unsigned int val, unsigned long addr) | |||
144 | 109 | ||
145 | static inline void gsc_writeq(unsigned long long val, unsigned long addr) | 110 | static inline void gsc_writeq(unsigned long long val, unsigned long addr) |
146 | { | 111 | { |
147 | gsc_check_addr(addr); | ||
148 | |||
149 | #ifdef __LP64__ | 112 | #ifdef __LP64__ |
150 | __asm__ __volatile__( | 113 | __asm__ __volatile__( |
151 | " stda %0,0(%1)\n" | 114 | " stda %0,0(%1)\n" |
@@ -180,14 +143,7 @@ extern inline void * ioremap_nocache(unsigned long offset, unsigned long size) | |||
180 | 143 | ||
181 | extern void iounmap(void __iomem *addr); | 144 | extern void iounmap(void __iomem *addr); |
182 | 145 | ||
183 | /* | ||
184 | * USE_HPPA_IOREMAP is the magic flag to enable or disable real ioremap() | ||
185 | * functionality. It's currently disabled because it may not work on some | ||
186 | * machines. | ||
187 | */ | ||
188 | #define USE_HPPA_IOREMAP 0 | ||
189 | 146 | ||
190 | #if USE_HPPA_IOREMAP | ||
191 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) | 147 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) |
192 | { | 148 | { |
193 | return (*(volatile unsigned char __force *) (addr)); | 149 | return (*(volatile unsigned char __force *) (addr)); |
@@ -221,57 +177,6 @@ static inline void __raw_writeq(unsigned long long b, volatile void __iomem *add | |||
221 | { | 177 | { |
222 | *(volatile unsigned long long __force *) addr = b; | 178 | *(volatile unsigned long long __force *) addr = b; |
223 | } | 179 | } |
224 | #else /* !USE_HPPA_IOREMAP */ | ||
225 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) | ||
226 | { | ||
227 | __raw_check_addr(addr); | ||
228 | |||
229 | return gsc_readb((unsigned long) addr); | ||
230 | } | ||
231 | static inline unsigned short __raw_readw(const volatile void __iomem *addr) | ||
232 | { | ||
233 | __raw_check_addr(addr); | ||
234 | |||
235 | return gsc_readw((unsigned long) addr); | ||
236 | } | ||
237 | static inline unsigned int __raw_readl(const volatile void __iomem *addr) | ||
238 | { | ||
239 | __raw_check_addr(addr); | ||
240 | |||
241 | return gsc_readl((unsigned long) addr); | ||
242 | } | ||
243 | static inline unsigned long long __raw_readq(const volatile void __iomem *addr) | ||
244 | { | ||
245 | __raw_check_addr(addr); | ||
246 | |||
247 | return gsc_readq((unsigned long) addr); | ||
248 | } | ||
249 | |||
250 | static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr) | ||
251 | { | ||
252 | __raw_check_addr(addr); | ||
253 | |||
254 | gsc_writeb(b, (unsigned long) addr); | ||
255 | } | ||
256 | static inline void __raw_writew(unsigned short b, volatile void __iomem *addr) | ||
257 | { | ||
258 | __raw_check_addr(addr); | ||
259 | |||
260 | gsc_writew(b, (unsigned long) addr); | ||
261 | } | ||
262 | static inline void __raw_writel(unsigned int b, volatile void __iomem *addr) | ||
263 | { | ||
264 | __raw_check_addr(addr); | ||
265 | |||
266 | gsc_writel(b, (unsigned long) addr); | ||
267 | } | ||
268 | static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr) | ||
269 | { | ||
270 | __raw_check_addr(addr); | ||
271 | |||
272 | gsc_writeq(b, (unsigned long) addr); | ||
273 | } | ||
274 | #endif /* !USE_HPPA_IOREMAP */ | ||
275 | 180 | ||
276 | /* readb can never be const, so use __fswab instead of le*_to_cpu */ | 181 | /* readb can never be const, so use __fswab instead of le*_to_cpu */ |
277 | #define readb(addr) __raw_readb(addr) | 182 | #define readb(addr) __raw_readb(addr) |
diff --git a/include/asm-parisc/local.h b/include/asm-parisc/local.h index 892b3b2c4962..d0f550912755 100644 --- a/include/asm-parisc/local.h +++ b/include/asm-parisc/local.h | |||
@@ -4,16 +4,16 @@ | |||
4 | #include <linux/percpu.h> | 4 | #include <linux/percpu.h> |
5 | #include <asm/atomic.h> | 5 | #include <asm/atomic.h> |
6 | 6 | ||
7 | typedef atomic_t local_t; | 7 | typedef atomic_long_t local_t; |
8 | 8 | ||
9 | #define LOCAL_INIT(i) ATOMIC_INIT(i) | 9 | #define LOCAL_INIT(i) ATOMIC_LONG_INIT(i) |
10 | #define local_read(v) atomic_read(v) | 10 | #define local_read(v) atomic_long_read(v) |
11 | #define local_set(v,i) atomic_set(v,i) | 11 | #define local_set(v,i) atomic_long_set(v,i) |
12 | 12 | ||
13 | #define local_inc(v) atomic_inc(v) | 13 | #define local_inc(v) atomic_long_inc(v) |
14 | #define local_dec(v) atomic_dec(v) | 14 | #define local_dec(v) atomic_long_dec(v) |
15 | #define local_add(i, v) atomic_add(i, v) | 15 | #define local_add(i, v) atomic_long_add(i, v) |
16 | #define local_sub(i, v) atomic_sub(i, v) | 16 | #define local_sub(i, v) atomic_long_sub(i, v) |
17 | 17 | ||
18 | #define __local_inc(v) ((v)->counter++) | 18 | #define __local_inc(v) ((v)->counter++) |
19 | #define __local_dec(v) ((v)->counter--) | 19 | #define __local_dec(v) ((v)->counter--) |
diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h index 9f303c0c3cd7..45e02aa5bf4b 100644 --- a/include/asm-parisc/page.h +++ b/include/asm-parisc/page.h | |||
@@ -26,7 +26,7 @@ static inline void | |||
26 | copy_user_page(void *vto, void *vfrom, unsigned long vaddr, struct page *pg) | 26 | copy_user_page(void *vto, void *vfrom, unsigned long vaddr, struct page *pg) |
27 | { | 27 | { |
28 | copy_user_page_asm(vto, vfrom); | 28 | copy_user_page_asm(vto, vfrom); |
29 | flush_kernel_dcache_page(vto); | 29 | flush_kernel_dcache_page_asm(vto); |
30 | /* XXX: ppc flushes icache too, should we? */ | 30 | /* XXX: ppc flushes icache too, should we? */ |
31 | } | 31 | } |
32 | 32 | ||
@@ -40,14 +40,19 @@ clear_user_page(void *page, unsigned long vaddr, struct page *pg) | |||
40 | /* | 40 | /* |
41 | * These are used to make use of C type-checking.. | 41 | * These are used to make use of C type-checking.. |
42 | */ | 42 | */ |
43 | #ifdef __LP64__ | 43 | #define STRICT_MM_TYPECHECKS |
44 | typedef struct { unsigned long pte; } pte_t; | 44 | #ifdef STRICT_MM_TYPECHECKS |
45 | #else | 45 | typedef struct { unsigned long pte; |
46 | typedef struct { | 46 | #if !defined(CONFIG_64BIT) |
47 | unsigned long pte; | 47 | unsigned long future_flags; |
48 | unsigned long flags; | 48 | /* XXX: it's possible to remove future_flags and change BITS_PER_PTE_ENTRY |
49 | } pte_t; | 49 | to 2, but then strangely the identical 32bit kernel boots on a |
50 | c3000(pa20), but not any longer on a 715(pa11). | ||
51 | Still investigating... HelgeD. | ||
52 | */ | ||
50 | #endif | 53 | #endif |
54 | } pte_t; /* either 32 or 64bit */ | ||
55 | |||
51 | /* NOTE: even on 64 bits, these entries are __u32 because we allocate | 56 | /* NOTE: even on 64 bits, these entries are __u32 because we allocate |
52 | * the pmd and pgd in ZONE_DMA (i.e. under 4GB) */ | 57 | * the pmd and pgd in ZONE_DMA (i.e. under 4GB) */ |
53 | typedef struct { __u32 pmd; } pmd_t; | 58 | typedef struct { __u32 pmd; } pmd_t; |
@@ -55,25 +60,44 @@ typedef struct { __u32 pgd; } pgd_t; | |||
55 | typedef struct { unsigned long pgprot; } pgprot_t; | 60 | typedef struct { unsigned long pgprot; } pgprot_t; |
56 | 61 | ||
57 | #define pte_val(x) ((x).pte) | 62 | #define pte_val(x) ((x).pte) |
58 | #ifdef __LP64__ | ||
59 | #define pte_flags(x) (*(__u32 *)&((x).pte)) | ||
60 | #else | ||
61 | #define pte_flags(x) ((x).flags) | ||
62 | #endif | ||
63 | |||
64 | /* These do not work lvalues, so make sure we don't use them as such. */ | 63 | /* These do not work lvalues, so make sure we don't use them as such. */ |
65 | #define pmd_val(x) ((x).pmd + 0) | 64 | #define pmd_val(x) ((x).pmd + 0) |
66 | #define pgd_val(x) ((x).pgd + 0) | 65 | #define pgd_val(x) ((x).pgd + 0) |
67 | #define pgprot_val(x) ((x).pgprot) | 66 | #define pgprot_val(x) ((x).pgprot) |
68 | 67 | ||
69 | #define __pmd_val_set(x,n) (x).pmd = (n) | ||
70 | #define __pgd_val_set(x,n) (x).pgd = (n) | ||
71 | |||
72 | #define __pte(x) ((pte_t) { (x) } ) | 68 | #define __pte(x) ((pte_t) { (x) } ) |
73 | #define __pmd(x) ((pmd_t) { (x) } ) | 69 | #define __pmd(x) ((pmd_t) { (x) } ) |
74 | #define __pgd(x) ((pgd_t) { (x) } ) | 70 | #define __pgd(x) ((pgd_t) { (x) } ) |
75 | #define __pgprot(x) ((pgprot_t) { (x) } ) | 71 | #define __pgprot(x) ((pgprot_t) { (x) } ) |
76 | 72 | ||
73 | #define __pmd_val_set(x,n) (x).pmd = (n) | ||
74 | #define __pgd_val_set(x,n) (x).pgd = (n) | ||
75 | |||
76 | #else | ||
77 | /* | ||
78 | * .. while these make it easier on the compiler | ||
79 | */ | ||
80 | typedef unsigned long pte_t; | ||
81 | typedef __u32 pmd_t; | ||
82 | typedef __u32 pgd_t; | ||
83 | typedef unsigned long pgprot_t; | ||
84 | |||
85 | #define pte_val(x) (x) | ||
86 | #define pmd_val(x) (x) | ||
87 | #define pgd_val(x) (x) | ||
88 | #define pgprot_val(x) (x) | ||
89 | |||
90 | #define __pte(x) (x) | ||
91 | #define __pmd(x) (x) | ||
92 | #define __pgd(x) (x) | ||
93 | #define __pgprot(x) (x) | ||
94 | |||
95 | #define __pmd_val_set(x,n) (x) = (n) | ||
96 | #define __pgd_val_set(x,n) (x) = (n) | ||
97 | |||
98 | #endif /* STRICT_MM_TYPECHECKS */ | ||
99 | |||
100 | |||
77 | typedef struct __physmem_range { | 101 | typedef struct __physmem_range { |
78 | unsigned long start_pfn; | 102 | unsigned long start_pfn; |
79 | unsigned long pages; /* PAGE_SIZE pages */ | 103 | unsigned long pages; /* PAGE_SIZE pages */ |
diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index fe7f6a2f5aa7..77bbafb7f73e 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h | |||
@@ -289,4 +289,9 @@ static inline void pcibios_add_platform_entries(struct pci_dev *dev) | |||
289 | { | 289 | { |
290 | } | 290 | } |
291 | 291 | ||
292 | static inline void pcibios_penalize_isa_irq(int irq, int active) | ||
293 | { | ||
294 | /* We don't need to penalize isa irq's */ | ||
295 | } | ||
296 | |||
292 | #endif /* __ASM_PARISC_PCI_H */ | 297 | #endif /* __ASM_PARISC_PCI_H */ |
diff --git a/include/asm-parisc/pdc_chassis.h b/include/asm-parisc/pdc_chassis.h index adac9ac2743f..a609273dc6bf 100644 --- a/include/asm-parisc/pdc_chassis.h +++ b/include/asm-parisc/pdc_chassis.h | |||
@@ -6,9 +6,8 @@ | |||
6 | * | 6 | * |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License, version 2, as |
10 | * the Free Software Foundation; either version 2, or (at your option) | 10 | * published by the Free Software Foundation. |
11 | * any later version. | ||
12 | * | 11 | * |
13 | * This program is distributed in the hope that it will be useful, | 12 | * This program is distributed in the hope that it will be useful, |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h index 16c2ac075fc5..a93960e232cf 100644 --- a/include/asm-parisc/spinlock.h +++ b/include/asm-parisc/spinlock.h | |||
@@ -134,14 +134,22 @@ static __inline__ int __raw_write_trylock(raw_rwlock_t *rw) | |||
134 | return 1; | 134 | return 1; |
135 | } | 135 | } |
136 | 136 | ||
137 | static __inline__ int __raw_is_read_locked(raw_rwlock_t *rw) | 137 | /* |
138 | * read_can_lock - would read_trylock() succeed? | ||
139 | * @lock: the rwlock in question. | ||
140 | */ | ||
141 | static __inline__ int __raw_read_can_lock(raw_rwlock_t *rw) | ||
138 | { | 142 | { |
139 | return rw->counter > 0; | 143 | return rw->counter >= 0; |
140 | } | 144 | } |
141 | 145 | ||
142 | static __inline__ int __raw_is_write_locked(raw_rwlock_t *rw) | 146 | /* |
147 | * write_can_lock - would write_trylock() succeed? | ||
148 | * @lock: the rwlock in question. | ||
149 | */ | ||
150 | static __inline__ int __raw_write_can_lock(raw_rwlock_t *rw) | ||
143 | { | 151 | { |
144 | return rw->counter < 0; | 152 | return !rw->counter; |
145 | } | 153 | } |
146 | 154 | ||
147 | #endif /* __ASM_SPINLOCK_H */ | 155 | #endif /* __ASM_SPINLOCK_H */ |
diff --git a/include/asm-parisc/thread_info.h b/include/asm-parisc/thread_info.h index ac32f140b83a..f2f83b04cd8b 100644 --- a/include/asm-parisc/thread_info.h +++ b/include/asm-parisc/thread_info.h | |||
@@ -49,7 +49,8 @@ struct thread_info { | |||
49 | 49 | ||
50 | #endif /* !__ASSEMBLY */ | 50 | #endif /* !__ASSEMBLY */ |
51 | 51 | ||
52 | #define PREEMPT_ACTIVE 0x10000000 | 52 | #define PREEMPT_ACTIVE_BIT 28 |
53 | #define PREEMPT_ACTIVE (1 << PREEMPT_ACTIVE_BIT) | ||
53 | 54 | ||
54 | /* | 55 | /* |
55 | * thread information flags | 56 | * thread information flags |