diff options
author | Gary Hade <garyhade@us.ibm.com> | 2007-10-08 19:24:16 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2007-10-12 18:03:18 -0400 |
commit | 11949255d9433ea6c0908b7390ec4faecd1d4cf0 (patch) | |
tree | bfbec17f06906f9fbbc65263af010b4cb170c80a /include | |
parent | 62f420f828249f686aaae949ac3439d1304a759a (diff) |
PCI: modify PCI bridge control ISA flag for clarity
Modify PCI Bridge Control ISA flag for clarity
This patch changes PCI_BRIDGE_CTL_NO_ISA to PCI_BRIDGE_CTL_ISA
and modifies it's clarifying comment and locations where used.
The change reduces the chance of future confusion since it makes
the set/unset meaning of the bit the same in both the bridge
control register and bridge_ctl field of the pci_bus struct.
Signed-off-by: Gary Hade <garyhade@us.ibm.com>
Acked-by: Linas Vepstas <linas@austin.ibm.com>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/pci_regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 4a24ee368a11..c1914a8b94a9 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h | |||
@@ -147,7 +147,7 @@ | |||
147 | #define PCI_BRIDGE_CONTROL 0x3e | 147 | #define PCI_BRIDGE_CONTROL 0x3e |
148 | #define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ | 148 | #define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */ |
149 | #define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ | 149 | #define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */ |
150 | #define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */ | 150 | #define PCI_BRIDGE_CTL_ISA 0x04 /* Enable ISA mode */ |
151 | #define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ | 151 | #define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */ |
152 | #define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ | 152 | #define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */ |
153 | #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ | 153 | #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ |