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authorKrzysztof Helt <krzysztof.h1@wp.pl>2007-10-16 04:28:43 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-16 12:43:15 -0400
commit8af1d50f7f679375f579782f2d5eb5e2a1508df8 (patch)
tree7a8db53b79bad7bdc728d7aa84b55bab810f6667 /include/video/tdfx.h
parent245a2c2c69fee367ac38cf84af18b56374dbec22 (diff)
tdfxfb: coding style improvement
This patch contains coding style improvements to the tdfxfb driver (white spaces, indentations, long lines). It also moves fb_ops structure to the end of file, so forward declarations of ops functions are redundant. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/video/tdfx.h')
-rw-r--r--include/video/tdfx.h262
1 files changed, 131 insertions, 131 deletions
diff --git a/include/video/tdfx.h b/include/video/tdfx.h
index c1cc94ba3fdd..e6ab66fc7fc8 100644
--- a/include/video/tdfx.h
+++ b/include/video/tdfx.h
@@ -2,140 +2,140 @@
2#define _TDFX_H 2#define _TDFX_H
3 3
4/* membase0 register offsets */ 4/* membase0 register offsets */
5#define STATUS 0x00 5#define STATUS 0x00
6#define PCIINIT0 0x04 6#define PCIINIT0 0x04
7#define SIPMONITOR 0x08 7#define SIPMONITOR 0x08
8#define LFBMEMORYCONFIG 0x0c 8#define LFBMEMORYCONFIG 0x0c
9#define MISCINIT0 0x10 9#define MISCINIT0 0x10
10#define MISCINIT1 0x14 10#define MISCINIT1 0x14
11#define DRAMINIT0 0x18 11#define DRAMINIT0 0x18
12#define DRAMINIT1 0x1c 12#define DRAMINIT1 0x1c
13#define AGPINIT 0x20 13#define AGPINIT 0x20
14#define TMUGBEINIT 0x24 14#define TMUGBEINIT 0x24
15#define VGAINIT0 0x28 15#define VGAINIT0 0x28
16#define VGAINIT1 0x2c 16#define VGAINIT1 0x2c
17#define DRAMCOMMAND 0x30 17#define DRAMCOMMAND 0x30
18#define DRAMDATA 0x34 18#define DRAMDATA 0x34
19/* reserved 0x38 */ 19/* reserved 0x38 */
20/* reserved 0x3c */ 20/* reserved 0x3c */
21#define PLLCTRL0 0x40 21#define PLLCTRL0 0x40
22#define PLLCTRL1 0x44 22#define PLLCTRL1 0x44
23#define PLLCTRL2 0x48 23#define PLLCTRL2 0x48
24#define DACMODE 0x4c 24#define DACMODE 0x4c
25#define DACADDR 0x50 25#define DACADDR 0x50
26#define DACDATA 0x54 26#define DACDATA 0x54
27#define RGBMAXDELTA 0x58 27#define RGBMAXDELTA 0x58
28#define VIDPROCCFG 0x5c 28#define VIDPROCCFG 0x5c
29#define HWCURPATADDR 0x60 29#define HWCURPATADDR 0x60
30#define HWCURLOC 0x64 30#define HWCURLOC 0x64
31#define HWCURC0 0x68 31#define HWCURC0 0x68
32#define HWCURC1 0x6c 32#define HWCURC1 0x6c
33#define VIDINFORMAT 0x70 33#define VIDINFORMAT 0x70
34#define VIDINSTATUS 0x74 34#define VIDINSTATUS 0x74
35#define VIDSERPARPORT 0x78 35#define VIDSERPARPORT 0x78
36#define VIDINXDELTA 0x7c 36#define VIDINXDELTA 0x7c
37#define VIDININITERR 0x80 37#define VIDININITERR 0x80
38#define VIDINYDELTA 0x84 38#define VIDINYDELTA 0x84
39#define VIDPIXBUFTHOLD 0x88 39#define VIDPIXBUFTHOLD 0x88
40#define VIDCHRMIN 0x8c 40#define VIDCHRMIN 0x8c
41#define VIDCHRMAX 0x90 41#define VIDCHRMAX 0x90
42#define VIDCURLIN 0x94 42#define VIDCURLIN 0x94
43#define VIDSCREENSIZE 0x98 43#define VIDSCREENSIZE 0x98
44#define VIDOVRSTARTCRD 0x9c 44#define VIDOVRSTARTCRD 0x9c
45#define VIDOVRENDCRD 0xa0 45#define VIDOVRENDCRD 0xa0
46#define VIDOVRDUDX 0xa4 46#define VIDOVRDUDX 0xa4
47#define VIDOVRDUDXOFF 0xa8 47#define VIDOVRDUDXOFF 0xa8
48#define VIDOVRDVDY 0xac 48#define VIDOVRDVDY 0xac
49/* ... */ 49/* ... */
50#define VIDOVRDVDYOFF 0xe0 50#define VIDOVRDVDYOFF 0xe0
51#define VIDDESKSTART 0xe4 51#define VIDDESKSTART 0xe4
52#define VIDDESKSTRIDE 0xe8 52#define VIDDESKSTRIDE 0xe8
53#define VIDINADDR0 0xec 53#define VIDINADDR0 0xec
54#define VIDINADDR1 0xf0 54#define VIDINADDR1 0xf0
55#define VIDINADDR2 0xf4 55#define VIDINADDR2 0xf4
56#define VIDINSTRIDE 0xf8 56#define VIDINSTRIDE 0xf8
57#define VIDCUROVRSTART 0xfc 57#define VIDCUROVRSTART 0xfc
58 58
59#define INTCTRL (0x00100000 + 0x04) 59#define INTCTRL (0x00100000 + 0x04)
60#define CLIP0MIN (0x00100000 + 0x08) 60#define CLIP0MIN (0x00100000 + 0x08)
61#define CLIP0MAX (0x00100000 + 0x0c) 61#define CLIP0MAX (0x00100000 + 0x0c)
62#define DSTBASE (0x00100000 + 0x10) 62#define DSTBASE (0x00100000 + 0x10)
63#define DSTFORMAT (0x00100000 + 0x14) 63#define DSTFORMAT (0x00100000 + 0x14)
64#define SRCBASE (0x00100000 + 0x34) 64#define SRCBASE (0x00100000 + 0x34)
65#define COMMANDEXTRA_2D (0x00100000 + 0x38) 65#define COMMANDEXTRA_2D (0x00100000 + 0x38)
66#define CLIP1MIN (0x00100000 + 0x4c) 66#define CLIP1MIN (0x00100000 + 0x4c)
67#define CLIP1MAX (0x00100000 + 0x50) 67#define CLIP1MAX (0x00100000 + 0x50)
68#define SRCFORMAT (0x00100000 + 0x54) 68#define SRCFORMAT (0x00100000 + 0x54)
69#define SRCSIZE (0x00100000 + 0x58) 69#define SRCSIZE (0x00100000 + 0x58)
70#define SRCXY (0x00100000 + 0x5c) 70#define SRCXY (0x00100000 + 0x5c)
71#define COLORBACK (0x00100000 + 0x60) 71#define COLORBACK (0x00100000 + 0x60)
72#define COLORFORE (0x00100000 + 0x64) 72#define COLORFORE (0x00100000 + 0x64)
73#define DSTSIZE (0x00100000 + 0x68) 73#define DSTSIZE (0x00100000 + 0x68)
74#define DSTXY (0x00100000 + 0x6c) 74#define DSTXY (0x00100000 + 0x6c)
75#define COMMAND_2D (0x00100000 + 0x70) 75#define COMMAND_2D (0x00100000 + 0x70)
76#define LAUNCH_2D (0x00100000 + 0x80) 76#define LAUNCH_2D (0x00100000 + 0x80)
77 77
78#define COMMAND_3D (0x00200000 + 0x120) 78#define COMMAND_3D (0x00200000 + 0x120)
79 79
80/* register bitfields (not all, only as needed) */ 80/* register bitfields (not all, only as needed) */
81 81
82#define BIT(x) (1UL << (x)) 82#define BIT(x) (1UL << (x))
83 83
84/* COMMAND_2D reg. values */ 84/* COMMAND_2D reg. values */
85#define TDFX_ROP_COPY 0xcc // src 85#define TDFX_ROP_COPY 0xcc /* src */
86#define TDFX_ROP_INVERT 0x55 // NOT dst 86#define TDFX_ROP_INVERT 0x55 /* NOT dst */
87#define TDFX_ROP_XOR 0x66 // src XOR dst 87#define TDFX_ROP_XOR 0x66 /* src XOR dst */
88 88
89#define AUTOINC_DSTX BIT(10) 89#define AUTOINC_DSTX BIT(10)
90#define AUTOINC_DSTY BIT(11) 90#define AUTOINC_DSTY BIT(11)
91#define COMMAND_2D_FILLRECT 0x05 91#define COMMAND_2D_FILLRECT 0x05
92#define COMMAND_2D_S2S_BITBLT 0x01 // screen to screen 92#define COMMAND_2D_S2S_BITBLT 0x01 /* screen to screen */
93#define COMMAND_2D_H2S_BITBLT 0x03 // host to screen 93#define COMMAND_2D_H2S_BITBLT 0x03 /* host to screen */
94 94
95#define COMMAND_3D_NOP 0x00 95#define COMMAND_3D_NOP 0x00
96#define STATUS_RETRACE BIT(6) 96#define STATUS_RETRACE BIT(6)
97#define STATUS_BUSY BIT(9) 97#define STATUS_BUSY BIT(9)
98#define MISCINIT1_CLUT_INV BIT(0) 98#define MISCINIT1_CLUT_INV BIT(0)
99#define MISCINIT1_2DBLOCK_DIS BIT(15) 99#define MISCINIT1_2DBLOCK_DIS BIT(15)
100#define DRAMINIT0_SGRAM_NUM BIT(26) 100#define DRAMINIT0_SGRAM_NUM BIT(26)
101#define DRAMINIT0_SGRAM_TYPE BIT(27) 101#define DRAMINIT0_SGRAM_TYPE BIT(27)
102#define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27)|BIT(28)|BIT(29)) 102#define DRAMINIT0_SGRAM_TYPE_MASK (BIT(27) | BIT(28) | BIT(29))
103#define DRAMINIT0_SGRAM_TYPE_SHIFT 27 103#define DRAMINIT0_SGRAM_TYPE_SHIFT 27
104#define DRAMINIT1_MEM_SDRAM BIT(30) 104#define DRAMINIT1_MEM_SDRAM BIT(30)
105#define VGAINIT0_VGA_DISABLE BIT(0) 105#define VGAINIT0_VGA_DISABLE BIT(0)
106#define VGAINIT0_EXT_TIMING BIT(1) 106#define VGAINIT0_EXT_TIMING BIT(1)
107#define VGAINIT0_8BIT_DAC BIT(2) 107#define VGAINIT0_8BIT_DAC BIT(2)
108#define VGAINIT0_EXT_ENABLE BIT(6) 108#define VGAINIT0_EXT_ENABLE BIT(6)
109#define VGAINIT0_WAKEUP_3C3 BIT(8) 109#define VGAINIT0_WAKEUP_3C3 BIT(8)
110#define VGAINIT0_LEGACY_DISABLE BIT(9) 110#define VGAINIT0_LEGACY_DISABLE BIT(9)
111#define VGAINIT0_ALT_READBACK BIT(10) 111#define VGAINIT0_ALT_READBACK BIT(10)
112#define VGAINIT0_FAST_BLINK BIT(11) 112#define VGAINIT0_FAST_BLINK BIT(11)
113#define VGAINIT0_EXTSHIFTOUT BIT(12) 113#define VGAINIT0_EXTSHIFTOUT BIT(12)
114#define VGAINIT0_DECODE_3C6 BIT(13) 114#define VGAINIT0_DECODE_3C6 BIT(13)
115#define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22) 115#define VGAINIT0_SGRAM_HBLANK_DISABLE BIT(22)
116#define VGAINIT1_MASK 0x1fffff 116#define VGAINIT1_MASK 0x1fffff
117#define VIDCFG_VIDPROC_ENABLE BIT(0) 117#define VIDCFG_VIDPROC_ENABLE BIT(0)
118#define VIDCFG_CURS_X11 BIT(1) 118#define VIDCFG_CURS_X11 BIT(1)
119#define VIDCFG_INTERLACE BIT(3) 119#define VIDCFG_INTERLACE BIT(3)
120#define VIDCFG_HALF_MODE BIT(4) 120#define VIDCFG_HALF_MODE BIT(4)
121#define VIDCFG_DESK_ENABLE BIT(7) 121#define VIDCFG_DESK_ENABLE BIT(7)
122#define VIDCFG_CLUT_BYPASS BIT(10) 122#define VIDCFG_CLUT_BYPASS BIT(10)
123#define VIDCFG_2X BIT(26) 123#define VIDCFG_2X BIT(26)
124#define VIDCFG_HWCURSOR_ENABLE BIT(27) 124#define VIDCFG_HWCURSOR_ENABLE BIT(27)
125#define VIDCFG_PIXFMT_SHIFT 18 125#define VIDCFG_PIXFMT_SHIFT 18
126#define DACMODE_2X BIT(0) 126#define DACMODE_2X BIT(0)
127 127
128/* VGA rubbish, need to change this for multihead support */ 128/* VGA rubbish, need to change this for multihead support */
129#define MISC_W 0x3c2 129#define MISC_W 0x3c2
130#define MISC_R 0x3cc 130#define MISC_R 0x3cc
131#define SEQ_I 0x3c4 131#define SEQ_I 0x3c4
132#define SEQ_D 0x3c5 132#define SEQ_D 0x3c5
133#define CRT_I 0x3d4 133#define CRT_I 0x3d4
134#define CRT_D 0x3d5 134#define CRT_D 0x3d5
135#define ATT_IW 0x3c0 135#define ATT_IW 0x3c0
136#define IS1_R 0x3da 136#define IS1_R 0x3da
137#define GRA_I 0x3ce 137#define GRA_I 0x3ce
138#define GRA_D 0x3cf 138#define GRA_D 0x3cf
139 139
140#ifdef __KERNEL__ 140#ifdef __KERNEL__
141 141
@@ -143,9 +143,9 @@ struct banshee_reg {
143 /* VGA rubbish */ 143 /* VGA rubbish */
144 unsigned char att[21]; 144 unsigned char att[21];
145 unsigned char crt[25]; 145 unsigned char crt[25];
146 unsigned char gra[ 9]; 146 unsigned char gra[9];
147 unsigned char misc[1]; 147 unsigned char misc[1];
148 unsigned char seq[ 5]; 148 unsigned char seq[5];
149 149
150 /* Banshee extensions */ 150 /* Banshee extensions */
151 unsigned char ext[2]; 151 unsigned char ext[2];
@@ -180,15 +180,15 @@ struct tdfx_par {
180 u32 baseline; 180 u32 baseline;
181 181
182 struct { 182 struct {
183 int w,u,d; 183 int w, u, d;
184 unsigned long enable,disable; 184 unsigned long enable, disable;
185 struct timer_list timer; 185 struct timer_list timer;
186 } hwcursor; 186 } hwcursor;
187 187
188 spinlock_t DAClock; 188 spinlock_t DAClock;
189}; 189};
190 190
191#endif /* __KERNEL__ */ 191#endif /* __KERNEL__ */
192 192
193#endif /* _TDFX_H */ 193#endif /* _TDFX_H */
194 194
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-04 12:37:49 -0400