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authorLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-30 21:57:33 -0400
committerLucas De Marchi <lucas.demarchi@profusion.mobi>2011-03-31 10:26:23 -0400
commit25985edcedea6396277003854657b5f3cb31a628 (patch)
treef026e810210a2ee7290caeb737c23cb6472b7c38 /include/video/sstfb.h
parent6aba74f2791287ec407e0f92487a725a25908067 (diff)
Fix common misspellings
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Diffstat (limited to 'include/video/sstfb.h')
-rw-r--r--include/video/sstfb.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/include/video/sstfb.h b/include/video/sstfb.h
index b52f07381243..c449eace12cd 100644
--- a/include/video/sstfb.h
+++ b/include/video/sstfb.h
@@ -156,7 +156,7 @@
156#define DAC_READ FBIINIT2 /* in remap mode */ 156#define DAC_READ FBIINIT2 /* in remap mode */
157#define FBIINIT3 0x021c /* fbi controls */ 157#define FBIINIT3 0x021c /* fbi controls */
158# define DISABLE_TEXTURE BIT(6) 158# define DISABLE_TEXTURE BIT(6)
159# define Y_SWAP_ORIGIN_SHIFT 22 /* Y swap substraction value */ 159# define Y_SWAP_ORIGIN_SHIFT 22 /* Y swap subtraction value */
160#define HSYNC 0x0220 160#define HSYNC 0x0220
161#define VSYNC 0x0224 161#define VSYNC 0x0224
162#define DAC_DATA 0x022c 162#define DAC_DATA 0x022c
@@ -212,9 +212,9 @@
212# define DACREG_CR0_24BPP 0x50 /* mode 5 */ 212# define DACREG_CR0_24BPP 0x50 /* mode 5 */
213#define DACREG_CR1_I 0x05 213#define DACREG_CR1_I 0x05
214#define DACREG_CC_I 0x06 214#define DACREG_CC_I 0x06
215# define DACREG_CC_CLKA BIT(7) /* clk A controled by regs */ 215# define DACREG_CC_CLKA BIT(7) /* clk A controlled by regs */
216# define DACREG_CC_CLKA_C (2<<4) /* clk A uses reg C */ 216# define DACREG_CC_CLKA_C (2<<4) /* clk A uses reg C */
217# define DACREG_CC_CLKB BIT(3) /* clk B controled by regs */ 217# define DACREG_CC_CLKB BIT(3) /* clk B controlled by regs */
218# define DACREG_CC_CLKB_D 3 /* clkB uses reg D */ 218# define DACREG_CC_CLKB_D 3 /* clkB uses reg D */
219#define DACREG_AC0_I 0x48 /* clock A reg C */ 219#define DACREG_AC0_I 0x48 /* clock A reg C */
220#define DACREG_AC1_I 0x49 220#define DACREG_AC1_I 0x49