diff options
author | Archit Taneja <archit@ti.com> | 2012-06-28 01:45:51 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2012-06-29 03:15:52 -0400 |
commit | 23c8f88e8a140c8435658c369b26c7b60d8fe3c0 (patch) | |
tree | f4a454c8f17f9c10e055a8003bb1a2e89838523c /include/video/omapdss.h | |
parent | 07fb51c6bda74210b57a06e6dc901a6b0f04c09a (diff) |
OMAPDSS: Add interlace parameter to omap_video_timings
Add a parameter called interlace which tells whether the timings are in
interlaced or progressive mode. This aligns the omap_video_timings struct with
the Xorg modeline configuration.
It also removes the hack needed to write to divide the manager height by 2 if
the connected interface is VENC.
Signed-off-by: Archit Taneja <archit@ti.com>
Diffstat (limited to 'include/video/omapdss.h')
-rw-r--r-- | include/video/omapdss.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/video/omapdss.h b/include/video/omapdss.h index 14f261b584fa..d8ab94485c97 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h | |||
@@ -344,6 +344,8 @@ struct omap_video_timings { | |||
344 | enum omap_dss_signal_level vsync_level; | 344 | enum omap_dss_signal_level vsync_level; |
345 | /* Hsync logic level */ | 345 | /* Hsync logic level */ |
346 | enum omap_dss_signal_level hsync_level; | 346 | enum omap_dss_signal_level hsync_level; |
347 | /* Interlaced or Progressive timings */ | ||
348 | bool interlace; | ||
347 | /* Pixel clock edge to drive LCD data */ | 349 | /* Pixel clock edge to drive LCD data */ |
348 | enum omap_dss_signal_edge data_pclk_edge; | 350 | enum omap_dss_signal_edge data_pclk_edge; |
349 | /* Data enable logic level */ | 351 | /* Data enable logic level */ |