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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-11-15 04:02:39 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-11-15 04:02:39 -0500
commitc09cd6e9691ec6fce8cb90b65929cad389d39c84 (patch)
treed76104420f72172b21b8fb5ca512baa016ac892b /include/uapi
parent7eb1c496f7ac0f386552c0cd9144f6965fc61da5 (diff)
parent96ab4c70396e4e5a4d623bc95e86484682bef78f (diff)
Merge branch 'backlight-rework' into drm-intel-next-queued
Pull in Jani's backlight rework branch. This was merged through a separate branch to be able to sort out the Broadwell conflicts properly before pulling it into the main development branch. Conflicts: drivers/gpu/drm/i915/intel_display.c Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/uapi')
-rw-r--r--include/uapi/drm/armada_drm.h45
-rw-r--r--include/uapi/drm/tegra_drm.h29
2 files changed, 65 insertions, 9 deletions
diff --git a/include/uapi/drm/armada_drm.h b/include/uapi/drm/armada_drm.h
new file mode 100644
index 000000000000..8dec3fdc99c7
--- /dev/null
+++ b/include/uapi/drm/armada_drm.h
@@ -0,0 +1,45 @@
1/*
2 * Copyright (C) 2012 Russell King
3 * With inspiration from the i915 driver
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#ifndef DRM_ARMADA_IOCTL_H
10#define DRM_ARMADA_IOCTL_H
11
12#define DRM_ARMADA_GEM_CREATE 0x00
13#define DRM_ARMADA_GEM_MMAP 0x02
14#define DRM_ARMADA_GEM_PWRITE 0x03
15
16#define ARMADA_IOCTL(dir, name, str) \
17 DRM_##dir(DRM_COMMAND_BASE + DRM_ARMADA_##name, struct drm_armada_##str)
18
19struct drm_armada_gem_create {
20 uint32_t handle;
21 uint32_t size;
22};
23#define DRM_IOCTL_ARMADA_GEM_CREATE \
24 ARMADA_IOCTL(IOWR, GEM_CREATE, gem_create)
25
26struct drm_armada_gem_mmap {
27 uint32_t handle;
28 uint32_t pad;
29 uint64_t offset;
30 uint64_t size;
31 uint64_t addr;
32};
33#define DRM_IOCTL_ARMADA_GEM_MMAP \
34 ARMADA_IOCTL(IOWR, GEM_MMAP, gem_mmap)
35
36struct drm_armada_gem_pwrite {
37 uint64_t ptr;
38 uint32_t handle;
39 uint32_t offset;
40 uint32_t size;
41};
42#define DRM_IOCTL_ARMADA_GEM_PWRITE \
43 ARMADA_IOCTL(IOW, GEM_PWRITE, gem_pwrite)
44
45#endif
diff --git a/include/uapi/drm/tegra_drm.h b/include/uapi/drm/tegra_drm.h
index 73bde4eaf16c..5e1ab552cbed 100644
--- a/include/uapi/drm/tegra_drm.h
+++ b/include/uapi/drm/tegra_drm.h
@@ -19,6 +19,9 @@
19 19
20#include <drm/drm.h> 20#include <drm/drm.h>
21 21
22#define DRM_TEGRA_GEM_CREATE_TILED (1 << 0)
23#define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1)
24
22struct drm_tegra_gem_create { 25struct drm_tegra_gem_create {
23 __u64 size; 26 __u64 size;
24 __u32 flags; 27 __u32 flags;
@@ -65,6 +68,12 @@ struct drm_tegra_get_syncpt {
65 __u32 id; 68 __u32 id;
66}; 69};
67 70
71struct drm_tegra_get_syncpt_base {
72 __u64 context;
73 __u32 syncpt;
74 __u32 id;
75};
76
68struct drm_tegra_syncpt { 77struct drm_tegra_syncpt {
69 __u32 id; 78 __u32 id;
70 __u32 incrs; 79 __u32 incrs;
@@ -115,15 +124,16 @@ struct drm_tegra_submit {
115 __u32 reserved[5]; /* future expansion */ 124 __u32 reserved[5]; /* future expansion */
116}; 125};
117 126
118#define DRM_TEGRA_GEM_CREATE 0x00 127#define DRM_TEGRA_GEM_CREATE 0x00
119#define DRM_TEGRA_GEM_MMAP 0x01 128#define DRM_TEGRA_GEM_MMAP 0x01
120#define DRM_TEGRA_SYNCPT_READ 0x02 129#define DRM_TEGRA_SYNCPT_READ 0x02
121#define DRM_TEGRA_SYNCPT_INCR 0x03 130#define DRM_TEGRA_SYNCPT_INCR 0x03
122#define DRM_TEGRA_SYNCPT_WAIT 0x04 131#define DRM_TEGRA_SYNCPT_WAIT 0x04
123#define DRM_TEGRA_OPEN_CHANNEL 0x05 132#define DRM_TEGRA_OPEN_CHANNEL 0x05
124#define DRM_TEGRA_CLOSE_CHANNEL 0x06 133#define DRM_TEGRA_CLOSE_CHANNEL 0x06
125#define DRM_TEGRA_GET_SYNCPT 0x07 134#define DRM_TEGRA_GET_SYNCPT 0x07
126#define DRM_TEGRA_SUBMIT 0x08 135#define DRM_TEGRA_SUBMIT 0x08
136#define DRM_TEGRA_GET_SYNCPT_BASE 0x09
127 137
128#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create) 138#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
129#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap) 139#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
@@ -134,5 +144,6 @@ struct drm_tegra_submit {
134#define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel) 144#define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel)
135#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt) 145#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)
136#define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit) 146#define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)
147#define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base)
137 148
138#endif 149#endif