diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-21 13:01:27 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-21 13:01:27 -0400 |
commit | 0c8027d50c070859314a88aaff42453ff4f71819 (patch) | |
tree | 440ecaefad24571853796df50eb2f238052dd3f2 /include/uapi | |
parent | 1fc149933fd49a5b0e7738dc0853dbfbac4ae0e1 (diff) | |
parent | 64131a87f2aae2ed9e05d8227c5b009ca6c50d98 (diff) |
Merge tag 'media/v4.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media updates from Mauro Carvalho Chehab:
- a new frontend driver for new ATSC devices: lgdt3306a
- a new sensor driver: ov2659
- a new platform driver: xilinx
- the m88ts2022 tuner driver was merged at ts2020 driver
- the media controller gained experimental support for DVB and hybrid
devices
- lots of random cleanups, fixes and improvements on media drivers
* tag 'media/v4.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (404 commits)
[media] uvcvideo: add support for VIDIOC_QUERY_EXT_CTRL
[media] uvcvideo: fix cropcap v4l2-compliance failure
[media] media: omap3isp: remove unused clkdev
[media] coda: Add tracing support
[media] coda: drop dma_sync_single_for_device in coda_bitstream_queue
[media] coda: fix fill bitstream errors in nonstreaming case
[media] coda: call SEQ_END when the first queue is stopped
[media] coda: fail to start streaming if userspace set invalid formats
[media] coda: remove duplicate error messages for buffer allocations
[media] coda: move parameter buffer in together with context buffer allocation
[media] coda: allocate bitstream buffer from REQBUFS, size depends on the format
[media] coda: allocate per-context buffers from REQBUFS
[media] coda: use strlcpy instead of snprintf
[media] coda: bitstream payload is unsigned
[media] coda: fix double call to debugfs_remove
[media] coda: check kasprintf return value in coda_open
[media] coda: bitrate can only be set in kbps steps
[media] v4l2-mem2mem: no need to initialize b in v4l2_m2m_next_buf and v4l2_m2m_buf_remove
[media] s5p-mfc: set allow_zero_bytesused flag for vb2_queue_init
[media] coda: set allow_zero_bytesused flag for vb2_queue_init
...
Diffstat (limited to 'include/uapi')
-rw-r--r-- | include/uapi/linux/Kbuild | 1 | ||||
-rw-r--r-- | include/uapi/linux/am437x-vpfe.h | 2 | ||||
-rw-r--r-- | include/uapi/linux/media-bus-format.h | 15 | ||||
-rw-r--r-- | include/uapi/linux/media.h | 52 | ||||
-rw-r--r-- | include/uapi/linux/v4l2-dv-timings.h | 64 | ||||
-rw-r--r-- | include/uapi/linux/v4l2-subdev.h | 12 | ||||
-rw-r--r-- | include/uapi/linux/videodev2.h | 18 | ||||
-rw-r--r-- | include/uapi/linux/xilinx-v4l2-controls.h | 73 |
8 files changed, 192 insertions, 45 deletions
diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild index 38df23435ebb..640954b9ecf9 100644 --- a/include/uapi/linux/Kbuild +++ b/include/uapi/linux/Kbuild | |||
@@ -447,5 +447,6 @@ header-y += wireless.h | |||
447 | header-y += x25.h | 447 | header-y += x25.h |
448 | header-y += xattr.h | 448 | header-y += xattr.h |
449 | header-y += xfrm.h | 449 | header-y += xfrm.h |
450 | header-y += xilinx-v4l2-controls.h | ||
450 | header-y += zorro.h | 451 | header-y += zorro.h |
451 | header-y += zorro_ids.h | 452 | header-y += zorro_ids.h |
diff --git a/include/uapi/linux/am437x-vpfe.h b/include/uapi/linux/am437x-vpfe.h index 9b03033f9cd6..d75774317b9b 100644 --- a/include/uapi/linux/am437x-vpfe.h +++ b/include/uapi/linux/am437x-vpfe.h | |||
@@ -21,6 +21,8 @@ | |||
21 | #ifndef AM437X_VPFE_USER_H | 21 | #ifndef AM437X_VPFE_USER_H |
22 | #define AM437X_VPFE_USER_H | 22 | #define AM437X_VPFE_USER_H |
23 | 23 | ||
24 | #include <linux/videodev2.h> | ||
25 | |||
24 | enum vpfe_ccdc_data_size { | 26 | enum vpfe_ccdc_data_size { |
25 | VPFE_CCDC_DATA_16BITS = 0, | 27 | VPFE_CCDC_DATA_16BITS = 0, |
26 | VPFE_CCDC_DATA_15BITS, | 28 | VPFE_CCDC_DATA_15BITS, |
diff --git a/include/uapi/linux/media-bus-format.h b/include/uapi/linux/media-bus-format.h index 73c78f18a328..190d491d5b13 100644 --- a/include/uapi/linux/media-bus-format.h +++ b/include/uapi/linux/media-bus-format.h | |||
@@ -45,6 +45,7 @@ | |||
45 | #define MEDIA_BUS_FMT_RGB565_2X8_BE 0x1007 | 45 | #define MEDIA_BUS_FMT_RGB565_2X8_BE 0x1007 |
46 | #define MEDIA_BUS_FMT_RGB565_2X8_LE 0x1008 | 46 | #define MEDIA_BUS_FMT_RGB565_2X8_LE 0x1008 |
47 | #define MEDIA_BUS_FMT_RGB666_1X18 0x1009 | 47 | #define MEDIA_BUS_FMT_RGB666_1X18 0x1009 |
48 | #define MEDIA_BUS_FMT_RBG888_1X24 0x100e | ||
48 | #define MEDIA_BUS_FMT_RGB666_1X24_CPADHI 0x1015 | 49 | #define MEDIA_BUS_FMT_RGB666_1X24_CPADHI 0x1015 |
49 | #define MEDIA_BUS_FMT_RGB666_1X7X3_SPWG 0x1010 | 50 | #define MEDIA_BUS_FMT_RGB666_1X7X3_SPWG 0x1010 |
50 | #define MEDIA_BUS_FMT_BGR888_1X24 0x1013 | 51 | #define MEDIA_BUS_FMT_BGR888_1X24 0x1013 |
@@ -55,6 +56,7 @@ | |||
55 | #define MEDIA_BUS_FMT_RGB888_1X7X4_SPWG 0x1011 | 56 | #define MEDIA_BUS_FMT_RGB888_1X7X4_SPWG 0x1011 |
56 | #define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA 0x1012 | 57 | #define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA 0x1012 |
57 | #define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d | 58 | #define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d |
59 | #define MEDIA_BUS_FMT_RGB888_1X32_PADHI 0x100f | ||
58 | 60 | ||
59 | /* YUV (including grey) - next is 0x2026 */ | 61 | /* YUV (including grey) - next is 0x2026 */ |
60 | #define MEDIA_BUS_FMT_Y8_1X8 0x2001 | 62 | #define MEDIA_BUS_FMT_Y8_1X8 0x2001 |
@@ -73,6 +75,10 @@ | |||
73 | #define MEDIA_BUS_FMT_YUYV10_2X10 0x200b | 75 | #define MEDIA_BUS_FMT_YUYV10_2X10 0x200b |
74 | #define MEDIA_BUS_FMT_YVYU10_2X10 0x200c | 76 | #define MEDIA_BUS_FMT_YVYU10_2X10 0x200c |
75 | #define MEDIA_BUS_FMT_Y12_1X12 0x2013 | 77 | #define MEDIA_BUS_FMT_Y12_1X12 0x2013 |
78 | #define MEDIA_BUS_FMT_UYVY12_2X12 0x201c | ||
79 | #define MEDIA_BUS_FMT_VYUY12_2X12 0x201d | ||
80 | #define MEDIA_BUS_FMT_YUYV12_2X12 0x201e | ||
81 | #define MEDIA_BUS_FMT_YVYU12_2X12 0x201f | ||
76 | #define MEDIA_BUS_FMT_UYVY8_1X16 0x200f | 82 | #define MEDIA_BUS_FMT_UYVY8_1X16 0x200f |
77 | #define MEDIA_BUS_FMT_VYUY8_1X16 0x2010 | 83 | #define MEDIA_BUS_FMT_VYUY8_1X16 0x2010 |
78 | #define MEDIA_BUS_FMT_YUYV8_1X16 0x2011 | 84 | #define MEDIA_BUS_FMT_YUYV8_1X16 0x2011 |
@@ -82,17 +88,14 @@ | |||
82 | #define MEDIA_BUS_FMT_VYUY10_1X20 0x201b | 88 | #define MEDIA_BUS_FMT_VYUY10_1X20 0x201b |
83 | #define MEDIA_BUS_FMT_YUYV10_1X20 0x200d | 89 | #define MEDIA_BUS_FMT_YUYV10_1X20 0x200d |
84 | #define MEDIA_BUS_FMT_YVYU10_1X20 0x200e | 90 | #define MEDIA_BUS_FMT_YVYU10_1X20 0x200e |
91 | #define MEDIA_BUS_FMT_VUY8_1X24 0x2024 | ||
85 | #define MEDIA_BUS_FMT_YUV8_1X24 0x2025 | 92 | #define MEDIA_BUS_FMT_YUV8_1X24 0x2025 |
86 | #define MEDIA_BUS_FMT_YUV10_1X30 0x2016 | ||
87 | #define MEDIA_BUS_FMT_AYUV8_1X32 0x2017 | ||
88 | #define MEDIA_BUS_FMT_UYVY12_2X12 0x201c | ||
89 | #define MEDIA_BUS_FMT_VYUY12_2X12 0x201d | ||
90 | #define MEDIA_BUS_FMT_YUYV12_2X12 0x201e | ||
91 | #define MEDIA_BUS_FMT_YVYU12_2X12 0x201f | ||
92 | #define MEDIA_BUS_FMT_UYVY12_1X24 0x2020 | 93 | #define MEDIA_BUS_FMT_UYVY12_1X24 0x2020 |
93 | #define MEDIA_BUS_FMT_VYUY12_1X24 0x2021 | 94 | #define MEDIA_BUS_FMT_VYUY12_1X24 0x2021 |
94 | #define MEDIA_BUS_FMT_YUYV12_1X24 0x2022 | 95 | #define MEDIA_BUS_FMT_YUYV12_1X24 0x2022 |
95 | #define MEDIA_BUS_FMT_YVYU12_1X24 0x2023 | 96 | #define MEDIA_BUS_FMT_YVYU12_1X24 0x2023 |
97 | #define MEDIA_BUS_FMT_YUV10_1X30 0x2016 | ||
98 | #define MEDIA_BUS_FMT_AYUV8_1X32 0x2017 | ||
96 | 99 | ||
97 | /* Bayer - next is 0x3019 */ | 100 | /* Bayer - next is 0x3019 */ |
98 | #define MEDIA_BUS_FMT_SBGGR8_1X8 0x3001 | 101 | #define MEDIA_BUS_FMT_SBGGR8_1X8 0x3001 |
diff --git a/include/uapi/linux/media.h b/include/uapi/linux/media.h index d847c760e8f0..4e816be3de39 100644 --- a/include/uapi/linux/media.h +++ b/include/uapi/linux/media.h | |||
@@ -50,7 +50,14 @@ struct media_device_info { | |||
50 | #define MEDIA_ENT_T_DEVNODE_V4L (MEDIA_ENT_T_DEVNODE + 1) | 50 | #define MEDIA_ENT_T_DEVNODE_V4L (MEDIA_ENT_T_DEVNODE + 1) |
51 | #define MEDIA_ENT_T_DEVNODE_FB (MEDIA_ENT_T_DEVNODE + 2) | 51 | #define MEDIA_ENT_T_DEVNODE_FB (MEDIA_ENT_T_DEVNODE + 2) |
52 | #define MEDIA_ENT_T_DEVNODE_ALSA (MEDIA_ENT_T_DEVNODE + 3) | 52 | #define MEDIA_ENT_T_DEVNODE_ALSA (MEDIA_ENT_T_DEVNODE + 3) |
53 | #define MEDIA_ENT_T_DEVNODE_DVB (MEDIA_ENT_T_DEVNODE + 4) | 53 | #define MEDIA_ENT_T_DEVNODE_DVB_FE (MEDIA_ENT_T_DEVNODE + 4) |
54 | #define MEDIA_ENT_T_DEVNODE_DVB_DEMUX (MEDIA_ENT_T_DEVNODE + 5) | ||
55 | #define MEDIA_ENT_T_DEVNODE_DVB_DVR (MEDIA_ENT_T_DEVNODE + 6) | ||
56 | #define MEDIA_ENT_T_DEVNODE_DVB_CA (MEDIA_ENT_T_DEVNODE + 7) | ||
57 | #define MEDIA_ENT_T_DEVNODE_DVB_NET (MEDIA_ENT_T_DEVNODE + 8) | ||
58 | |||
59 | /* Legacy symbol. Use it to avoid userspace compilation breakages */ | ||
60 | #define MEDIA_ENT_T_DEVNODE_DVB MEDIA_ENT_T_DEVNODE_DVB_FE | ||
54 | 61 | ||
55 | #define MEDIA_ENT_T_V4L2_SUBDEV (2 << MEDIA_ENT_TYPE_SHIFT) | 62 | #define MEDIA_ENT_T_V4L2_SUBDEV (2 << MEDIA_ENT_TYPE_SHIFT) |
56 | #define MEDIA_ENT_T_V4L2_SUBDEV_SENSOR (MEDIA_ENT_T_V4L2_SUBDEV + 1) | 63 | #define MEDIA_ENT_T_V4L2_SUBDEV_SENSOR (MEDIA_ENT_T_V4L2_SUBDEV + 1) |
@@ -59,6 +66,8 @@ struct media_device_info { | |||
59 | /* A converter of analogue video to its digital representation. */ | 66 | /* A converter of analogue video to its digital representation. */ |
60 | #define MEDIA_ENT_T_V4L2_SUBDEV_DECODER (MEDIA_ENT_T_V4L2_SUBDEV + 4) | 67 | #define MEDIA_ENT_T_V4L2_SUBDEV_DECODER (MEDIA_ENT_T_V4L2_SUBDEV + 4) |
61 | 68 | ||
69 | #define MEDIA_ENT_T_V4L2_SUBDEV_TUNER (MEDIA_ENT_T_V4L2_SUBDEV + 5) | ||
70 | |||
62 | #define MEDIA_ENT_FL_DEFAULT (1 << 0) | 71 | #define MEDIA_ENT_FL_DEFAULT (1 << 0) |
63 | 72 | ||
64 | struct media_entity_desc { | 73 | struct media_entity_desc { |
@@ -78,17 +87,48 @@ struct media_entity_desc { | |||
78 | struct { | 87 | struct { |
79 | __u32 major; | 88 | __u32 major; |
80 | __u32 minor; | 89 | __u32 minor; |
81 | } v4l; | 90 | } dev; |
82 | struct { | 91 | |
83 | __u32 major; | 92 | #if 1 |
84 | __u32 minor; | 93 | /* |
85 | } fb; | 94 | * TODO: this shouldn't have been added without |
95 | * actual drivers that use this. When the first real driver | ||
96 | * appears that sets this information, special attention | ||
97 | * should be given whether this information is 1) enough, and | ||
98 | * 2) can deal with udev rules that rename devices. The struct | ||
99 | * dev would not be sufficient for this since that does not | ||
100 | * contain the subdevice information. In addition, struct dev | ||
101 | * can only refer to a single device, and not to multiple (e.g. | ||
102 | * pcm and mixer devices). | ||
103 | * | ||
104 | * So for now mark this as a to do. | ||
105 | */ | ||
86 | struct { | 106 | struct { |
87 | __u32 card; | 107 | __u32 card; |
88 | __u32 device; | 108 | __u32 device; |
89 | __u32 subdevice; | 109 | __u32 subdevice; |
90 | } alsa; | 110 | } alsa; |
111 | #endif | ||
112 | |||
113 | #if 1 | ||
114 | /* | ||
115 | * DEPRECATED: previous node specifications. Kept just to | ||
116 | * avoid breaking compilation, but media_entity_desc.dev | ||
117 | * should be used instead. In particular, alsa and dvb | ||
118 | * fields below are wrong: for all devnodes, there should | ||
119 | * be just major/minor inside the struct, as this is enough | ||
120 | * to represent any devnode, no matter what type. | ||
121 | */ | ||
122 | struct { | ||
123 | __u32 major; | ||
124 | __u32 minor; | ||
125 | } v4l; | ||
126 | struct { | ||
127 | __u32 major; | ||
128 | __u32 minor; | ||
129 | } fb; | ||
91 | int dvb; | 130 | int dvb; |
131 | #endif | ||
92 | 132 | ||
93 | /* Sub-device specifications */ | 133 | /* Sub-device specifications */ |
94 | /* Nothing needed yet */ | 134 | /* Nothing needed yet */ |
diff --git a/include/uapi/linux/v4l2-dv-timings.h b/include/uapi/linux/v4l2-dv-timings.h index 6c8f159e416e..c039f1d68a09 100644 --- a/include/uapi/linux/v4l2-dv-timings.h +++ b/include/uapi/linux/v4l2-dv-timings.h | |||
@@ -48,14 +48,15 @@ | |||
48 | .type = V4L2_DV_BT_656_1120, \ | 48 | .type = V4L2_DV_BT_656_1120, \ |
49 | V4L2_INIT_BT_TIMINGS(720, 480, 1, 0, \ | 49 | V4L2_INIT_BT_TIMINGS(720, 480, 1, 0, \ |
50 | 13500000, 19, 62, 57, 4, 3, 15, 4, 3, 16, \ | 50 | 13500000, 19, 62, 57, 4, 3, 15, 4, 3, 16, \ |
51 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_HALF_LINE) \ | 51 | V4L2_DV_BT_STD_CEA861, \ |
52 | V4L2_DV_FL_HALF_LINE | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
52 | } | 53 | } |
53 | 54 | ||
54 | #define V4L2_DV_BT_CEA_720X480P59_94 { \ | 55 | #define V4L2_DV_BT_CEA_720X480P59_94 { \ |
55 | .type = V4L2_DV_BT_656_1120, \ | 56 | .type = V4L2_DV_BT_656_1120, \ |
56 | V4L2_INIT_BT_TIMINGS(720, 480, 0, 0, \ | 57 | V4L2_INIT_BT_TIMINGS(720, 480, 0, 0, \ |
57 | 27000000, 16, 62, 60, 9, 6, 30, 0, 0, 0, \ | 58 | 27000000, 16, 62, 60, 9, 6, 30, 0, 0, 0, \ |
58 | V4L2_DV_BT_STD_CEA861, 0) \ | 59 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
59 | } | 60 | } |
60 | 61 | ||
61 | /* Note: these are the nominal timings, for HDMI links this format is typically | 62 | /* Note: these are the nominal timings, for HDMI links this format is typically |
@@ -64,14 +65,15 @@ | |||
64 | .type = V4L2_DV_BT_656_1120, \ | 65 | .type = V4L2_DV_BT_656_1120, \ |
65 | V4L2_INIT_BT_TIMINGS(720, 576, 1, 0, \ | 66 | V4L2_INIT_BT_TIMINGS(720, 576, 1, 0, \ |
66 | 13500000, 12, 63, 69, 2, 3, 19, 2, 3, 20, \ | 67 | 13500000, 12, 63, 69, 2, 3, 19, 2, 3, 20, \ |
67 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_HALF_LINE) \ | 68 | V4L2_DV_BT_STD_CEA861, \ |
69 | V4L2_DV_FL_HALF_LINE | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
68 | } | 70 | } |
69 | 71 | ||
70 | #define V4L2_DV_BT_CEA_720X576P50 { \ | 72 | #define V4L2_DV_BT_CEA_720X576P50 { \ |
71 | .type = V4L2_DV_BT_656_1120, \ | 73 | .type = V4L2_DV_BT_656_1120, \ |
72 | V4L2_INIT_BT_TIMINGS(720, 576, 0, 0, \ | 74 | V4L2_INIT_BT_TIMINGS(720, 576, 0, 0, \ |
73 | 27000000, 12, 64, 68, 5, 5, 39, 0, 0, 0, \ | 75 | 27000000, 12, 64, 68, 5, 5, 39, 0, 0, 0, \ |
74 | V4L2_DV_BT_STD_CEA861, 0) \ | 76 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
75 | } | 77 | } |
76 | 78 | ||
77 | #define V4L2_DV_BT_CEA_1280X720P24 { \ | 79 | #define V4L2_DV_BT_CEA_1280X720P24 { \ |
@@ -88,7 +90,7 @@ | |||
88 | V4L2_INIT_BT_TIMINGS(1280, 720, 0, \ | 90 | V4L2_INIT_BT_TIMINGS(1280, 720, 0, \ |
89 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 91 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
90 | 74250000, 2420, 40, 220, 5, 5, 20, 0, 0, 0, \ | 92 | 74250000, 2420, 40, 220, 5, 5, 20, 0, 0, 0, \ |
91 | V4L2_DV_BT_STD_CEA861, 0) \ | 93 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
92 | } | 94 | } |
93 | 95 | ||
94 | #define V4L2_DV_BT_CEA_1280X720P30 { \ | 96 | #define V4L2_DV_BT_CEA_1280X720P30 { \ |
@@ -96,7 +98,8 @@ | |||
96 | V4L2_INIT_BT_TIMINGS(1280, 720, 0, \ | 98 | V4L2_INIT_BT_TIMINGS(1280, 720, 0, \ |
97 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 99 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
98 | 74250000, 1760, 40, 220, 5, 5, 20, 0, 0, 0, \ | 100 | 74250000, 1760, 40, 220, 5, 5, 20, 0, 0, 0, \ |
99 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 101 | V4L2_DV_BT_STD_CEA861, \ |
102 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
100 | } | 103 | } |
101 | 104 | ||
102 | #define V4L2_DV_BT_CEA_1280X720P50 { \ | 105 | #define V4L2_DV_BT_CEA_1280X720P50 { \ |
@@ -104,7 +107,7 @@ | |||
104 | V4L2_INIT_BT_TIMINGS(1280, 720, 0, \ | 107 | V4L2_INIT_BT_TIMINGS(1280, 720, 0, \ |
105 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 108 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
106 | 74250000, 440, 40, 220, 5, 5, 20, 0, 0, 0, \ | 109 | 74250000, 440, 40, 220, 5, 5, 20, 0, 0, 0, \ |
107 | V4L2_DV_BT_STD_CEA861, 0) \ | 110 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
108 | } | 111 | } |
109 | 112 | ||
110 | #define V4L2_DV_BT_CEA_1280X720P60 { \ | 113 | #define V4L2_DV_BT_CEA_1280X720P60 { \ |
@@ -112,7 +115,8 @@ | |||
112 | V4L2_INIT_BT_TIMINGS(1280, 720, 0, \ | 115 | V4L2_INIT_BT_TIMINGS(1280, 720, 0, \ |
113 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 116 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
114 | 74250000, 110, 40, 220, 5, 5, 20, 0, 0, 0, \ | 117 | 74250000, 110, 40, 220, 5, 5, 20, 0, 0, 0, \ |
115 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 118 | V4L2_DV_BT_STD_CEA861, \ |
119 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
116 | } | 120 | } |
117 | 121 | ||
118 | #define V4L2_DV_BT_CEA_1920X1080P24 { \ | 122 | #define V4L2_DV_BT_CEA_1920X1080P24 { \ |
@@ -120,7 +124,8 @@ | |||
120 | V4L2_INIT_BT_TIMINGS(1920, 1080, 0, \ | 124 | V4L2_INIT_BT_TIMINGS(1920, 1080, 0, \ |
121 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 125 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
122 | 74250000, 638, 44, 148, 4, 5, 36, 0, 0, 0, \ | 126 | 74250000, 638, 44, 148, 4, 5, 36, 0, 0, 0, \ |
123 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 127 | V4L2_DV_BT_STD_CEA861, \ |
128 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
124 | } | 129 | } |
125 | 130 | ||
126 | #define V4L2_DV_BT_CEA_1920X1080P25 { \ | 131 | #define V4L2_DV_BT_CEA_1920X1080P25 { \ |
@@ -128,7 +133,7 @@ | |||
128 | V4L2_INIT_BT_TIMINGS(1920, 1080, 0, \ | 133 | V4L2_INIT_BT_TIMINGS(1920, 1080, 0, \ |
129 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 134 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
130 | 74250000, 528, 44, 148, 4, 5, 36, 0, 0, 0, \ | 135 | 74250000, 528, 44, 148, 4, 5, 36, 0, 0, 0, \ |
131 | V4L2_DV_BT_STD_CEA861, 0) \ | 136 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
132 | } | 137 | } |
133 | 138 | ||
134 | #define V4L2_DV_BT_CEA_1920X1080P30 { \ | 139 | #define V4L2_DV_BT_CEA_1920X1080P30 { \ |
@@ -136,7 +141,8 @@ | |||
136 | V4L2_INIT_BT_TIMINGS(1920, 1080, 0, \ | 141 | V4L2_INIT_BT_TIMINGS(1920, 1080, 0, \ |
137 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 142 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
138 | 74250000, 88, 44, 148, 4, 5, 36, 0, 0, 0, \ | 143 | 74250000, 88, 44, 148, 4, 5, 36, 0, 0, 0, \ |
139 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 144 | V4L2_DV_BT_STD_CEA861, \ |
145 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
140 | } | 146 | } |
141 | 147 | ||
142 | #define V4L2_DV_BT_CEA_1920X1080I50 { \ | 148 | #define V4L2_DV_BT_CEA_1920X1080I50 { \ |
@@ -144,7 +150,8 @@ | |||
144 | V4L2_INIT_BT_TIMINGS(1920, 1080, 1, \ | 150 | V4L2_INIT_BT_TIMINGS(1920, 1080, 1, \ |
145 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 151 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
146 | 74250000, 528, 44, 148, 2, 5, 15, 2, 5, 16, \ | 152 | 74250000, 528, 44, 148, 2, 5, 15, 2, 5, 16, \ |
147 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_HALF_LINE) \ | 153 | V4L2_DV_BT_STD_CEA861, \ |
154 | V4L2_DV_FL_HALF_LINE | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
148 | } | 155 | } |
149 | 156 | ||
150 | #define V4L2_DV_BT_CEA_1920X1080P50 { \ | 157 | #define V4L2_DV_BT_CEA_1920X1080P50 { \ |
@@ -152,7 +159,7 @@ | |||
152 | V4L2_INIT_BT_TIMINGS(1920, 1080, 0, \ | 159 | V4L2_INIT_BT_TIMINGS(1920, 1080, 0, \ |
153 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 160 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
154 | 148500000, 528, 44, 148, 4, 5, 36, 0, 0, 0, \ | 161 | 148500000, 528, 44, 148, 4, 5, 36, 0, 0, 0, \ |
155 | V4L2_DV_BT_STD_CEA861, 0) \ | 162 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
156 | } | 163 | } |
157 | 164 | ||
158 | #define V4L2_DV_BT_CEA_1920X1080I60 { \ | 165 | #define V4L2_DV_BT_CEA_1920X1080I60 { \ |
@@ -161,7 +168,8 @@ | |||
161 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 168 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
162 | 74250000, 88, 44, 148, 2, 5, 15, 2, 5, 16, \ | 169 | 74250000, 88, 44, 148, 2, 5, 15, 2, 5, 16, \ |
163 | V4L2_DV_BT_STD_CEA861, \ | 170 | V4L2_DV_BT_STD_CEA861, \ |
164 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_HALF_LINE) \ | 171 | V4L2_DV_FL_CAN_REDUCE_FPS | \ |
172 | V4L2_DV_FL_HALF_LINE | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
165 | } | 173 | } |
166 | 174 | ||
167 | #define V4L2_DV_BT_CEA_1920X1080P60 { \ | 175 | #define V4L2_DV_BT_CEA_1920X1080P60 { \ |
@@ -170,77 +178,83 @@ | |||
170 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ | 178 | V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \ |
171 | 148500000, 88, 44, 148, 4, 5, 36, 0, 0, 0, \ | 179 | 148500000, 88, 44, 148, 4, 5, 36, 0, 0, 0, \ |
172 | V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CEA861, \ | 180 | V4L2_DV_BT_STD_DMT | V4L2_DV_BT_STD_CEA861, \ |
173 | V4L2_DV_FL_CAN_REDUCE_FPS) \ | 181 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ |
174 | } | 182 | } |
175 | 183 | ||
176 | #define V4L2_DV_BT_CEA_3840X2160P24 { \ | 184 | #define V4L2_DV_BT_CEA_3840X2160P24 { \ |
177 | .type = V4L2_DV_BT_656_1120, \ | 185 | .type = V4L2_DV_BT_656_1120, \ |
178 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 186 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
179 | 297000000, 1276, 88, 296, 8, 10, 72, 0, 0, 0, \ | 187 | 297000000, 1276, 88, 296, 8, 10, 72, 0, 0, 0, \ |
180 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 188 | V4L2_DV_BT_STD_CEA861, \ |
189 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
181 | } | 190 | } |
182 | 191 | ||
183 | #define V4L2_DV_BT_CEA_3840X2160P25 { \ | 192 | #define V4L2_DV_BT_CEA_3840X2160P25 { \ |
184 | .type = V4L2_DV_BT_656_1120, \ | 193 | .type = V4L2_DV_BT_656_1120, \ |
185 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 194 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
186 | 297000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \ | 195 | 297000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \ |
187 | V4L2_DV_BT_STD_CEA861, 0) \ | 196 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
188 | } | 197 | } |
189 | 198 | ||
190 | #define V4L2_DV_BT_CEA_3840X2160P30 { \ | 199 | #define V4L2_DV_BT_CEA_3840X2160P30 { \ |
191 | .type = V4L2_DV_BT_656_1120, \ | 200 | .type = V4L2_DV_BT_656_1120, \ |
192 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 201 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
193 | 297000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \ | 202 | 297000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \ |
194 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 203 | V4L2_DV_BT_STD_CEA861, \ |
204 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
195 | } | 205 | } |
196 | 206 | ||
197 | #define V4L2_DV_BT_CEA_3840X2160P50 { \ | 207 | #define V4L2_DV_BT_CEA_3840X2160P50 { \ |
198 | .type = V4L2_DV_BT_656_1120, \ | 208 | .type = V4L2_DV_BT_656_1120, \ |
199 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 209 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
200 | 594000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \ | 210 | 594000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \ |
201 | V4L2_DV_BT_STD_CEA861, 0) \ | 211 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
202 | } | 212 | } |
203 | 213 | ||
204 | #define V4L2_DV_BT_CEA_3840X2160P60 { \ | 214 | #define V4L2_DV_BT_CEA_3840X2160P60 { \ |
205 | .type = V4L2_DV_BT_656_1120, \ | 215 | .type = V4L2_DV_BT_656_1120, \ |
206 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 216 | V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
207 | 594000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \ | 217 | 594000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \ |
208 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 218 | V4L2_DV_BT_STD_CEA861, \ |
219 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
209 | } | 220 | } |
210 | 221 | ||
211 | #define V4L2_DV_BT_CEA_4096X2160P24 { \ | 222 | #define V4L2_DV_BT_CEA_4096X2160P24 { \ |
212 | .type = V4L2_DV_BT_656_1120, \ | 223 | .type = V4L2_DV_BT_656_1120, \ |
213 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 224 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
214 | 297000000, 1020, 88, 296, 8, 10, 72, 0, 0, 0, \ | 225 | 297000000, 1020, 88, 296, 8, 10, 72, 0, 0, 0, \ |
215 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 226 | V4L2_DV_BT_STD_CEA861, \ |
227 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
216 | } | 228 | } |
217 | 229 | ||
218 | #define V4L2_DV_BT_CEA_4096X2160P25 { \ | 230 | #define V4L2_DV_BT_CEA_4096X2160P25 { \ |
219 | .type = V4L2_DV_BT_656_1120, \ | 231 | .type = V4L2_DV_BT_656_1120, \ |
220 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 232 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
221 | 297000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \ | 233 | 297000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \ |
222 | V4L2_DV_BT_STD_CEA861, 0) \ | 234 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
223 | } | 235 | } |
224 | 236 | ||
225 | #define V4L2_DV_BT_CEA_4096X2160P30 { \ | 237 | #define V4L2_DV_BT_CEA_4096X2160P30 { \ |
226 | .type = V4L2_DV_BT_656_1120, \ | 238 | .type = V4L2_DV_BT_656_1120, \ |
227 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 239 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
228 | 297000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \ | 240 | 297000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \ |
229 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 241 | V4L2_DV_BT_STD_CEA861, \ |
242 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
230 | } | 243 | } |
231 | 244 | ||
232 | #define V4L2_DV_BT_CEA_4096X2160P50 { \ | 245 | #define V4L2_DV_BT_CEA_4096X2160P50 { \ |
233 | .type = V4L2_DV_BT_656_1120, \ | 246 | .type = V4L2_DV_BT_656_1120, \ |
234 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 247 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
235 | 594000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \ | 248 | 594000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \ |
236 | V4L2_DV_BT_STD_CEA861, 0) \ | 249 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \ |
237 | } | 250 | } |
238 | 251 | ||
239 | #define V4L2_DV_BT_CEA_4096X2160P60 { \ | 252 | #define V4L2_DV_BT_CEA_4096X2160P60 { \ |
240 | .type = V4L2_DV_BT_656_1120, \ | 253 | .type = V4L2_DV_BT_656_1120, \ |
241 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | 254 | V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ |
242 | 594000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \ | 255 | 594000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \ |
243 | V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | 256 | V4L2_DV_BT_STD_CEA861, \ |
257 | V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \ | ||
244 | } | 258 | } |
245 | 259 | ||
246 | 260 | ||
diff --git a/include/uapi/linux/v4l2-subdev.h b/include/uapi/linux/v4l2-subdev.h index e0a7e3da498a..dbce2b554e02 100644 --- a/include/uapi/linux/v4l2-subdev.h +++ b/include/uapi/linux/v4l2-subdev.h | |||
@@ -69,12 +69,14 @@ struct v4l2_subdev_crop { | |||
69 | * @pad: pad number, as reported by the media API | 69 | * @pad: pad number, as reported by the media API |
70 | * @index: format index during enumeration | 70 | * @index: format index during enumeration |
71 | * @code: format code (MEDIA_BUS_FMT_ definitions) | 71 | * @code: format code (MEDIA_BUS_FMT_ definitions) |
72 | * @which: format type (from enum v4l2_subdev_format_whence) | ||
72 | */ | 73 | */ |
73 | struct v4l2_subdev_mbus_code_enum { | 74 | struct v4l2_subdev_mbus_code_enum { |
74 | __u32 pad; | 75 | __u32 pad; |
75 | __u32 index; | 76 | __u32 index; |
76 | __u32 code; | 77 | __u32 code; |
77 | __u32 reserved[9]; | 78 | __u32 which; |
79 | __u32 reserved[8]; | ||
78 | }; | 80 | }; |
79 | 81 | ||
80 | /** | 82 | /** |
@@ -82,6 +84,7 @@ struct v4l2_subdev_mbus_code_enum { | |||
82 | * @pad: pad number, as reported by the media API | 84 | * @pad: pad number, as reported by the media API |
83 | * @index: format index during enumeration | 85 | * @index: format index during enumeration |
84 | * @code: format code (MEDIA_BUS_FMT_ definitions) | 86 | * @code: format code (MEDIA_BUS_FMT_ definitions) |
87 | * @which: format type (from enum v4l2_subdev_format_whence) | ||
85 | */ | 88 | */ |
86 | struct v4l2_subdev_frame_size_enum { | 89 | struct v4l2_subdev_frame_size_enum { |
87 | __u32 index; | 90 | __u32 index; |
@@ -91,7 +94,8 @@ struct v4l2_subdev_frame_size_enum { | |||
91 | __u32 max_width; | 94 | __u32 max_width; |
92 | __u32 min_height; | 95 | __u32 min_height; |
93 | __u32 max_height; | 96 | __u32 max_height; |
94 | __u32 reserved[9]; | 97 | __u32 which; |
98 | __u32 reserved[8]; | ||
95 | }; | 99 | }; |
96 | 100 | ||
97 | /** | 101 | /** |
@@ -113,6 +117,7 @@ struct v4l2_subdev_frame_interval { | |||
113 | * @width: frame width in pixels | 117 | * @width: frame width in pixels |
114 | * @height: frame height in pixels | 118 | * @height: frame height in pixels |
115 | * @interval: frame interval in seconds | 119 | * @interval: frame interval in seconds |
120 | * @which: format type (from enum v4l2_subdev_format_whence) | ||
116 | */ | 121 | */ |
117 | struct v4l2_subdev_frame_interval_enum { | 122 | struct v4l2_subdev_frame_interval_enum { |
118 | __u32 index; | 123 | __u32 index; |
@@ -121,7 +126,8 @@ struct v4l2_subdev_frame_interval_enum { | |||
121 | __u32 width; | 126 | __u32 width; |
122 | __u32 height; | 127 | __u32 height; |
123 | struct v4l2_fract interval; | 128 | struct v4l2_fract interval; |
124 | __u32 reserved[9]; | 129 | __u32 which; |
130 | __u32 reserved[8]; | ||
125 | }; | 131 | }; |
126 | 132 | ||
127 | /** | 133 | /** |
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index fbdc3602ee27..fa376f7666ba 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h | |||
@@ -268,9 +268,10 @@ enum v4l2_ycbcr_encoding { | |||
268 | 268 | ||
269 | enum v4l2_quantization { | 269 | enum v4l2_quantization { |
270 | /* | 270 | /* |
271 | * The default for R'G'B' quantization is always full range. For | 271 | * The default for R'G'B' quantization is always full range, except |
272 | * Y'CbCr the quantization is always limited range, except for | 272 | * for the BT2020 colorspace. For Y'CbCr the quantization is always |
273 | * SYCC, XV601, XV709 or JPEG: those are full range. | 273 | * limited range, except for COLORSPACE_JPEG, SYCC, XV601 or XV709: |
274 | * those are full range. | ||
274 | */ | 275 | */ |
275 | V4L2_QUANTIZATION_DEFAULT = 0, | 276 | V4L2_QUANTIZATION_DEFAULT = 0, |
276 | V4L2_QUANTIZATION_FULL_RANGE = 1, | 277 | V4L2_QUANTIZATION_FULL_RANGE = 1, |
@@ -1187,6 +1188,12 @@ struct v4l2_bt_timings { | |||
1187 | exactly the same number of half-lines. Whether half-lines can be detected | 1188 | exactly the same number of half-lines. Whether half-lines can be detected |
1188 | or used depends on the hardware. */ | 1189 | or used depends on the hardware. */ |
1189 | #define V4L2_DV_FL_HALF_LINE (1 << 3) | 1190 | #define V4L2_DV_FL_HALF_LINE (1 << 3) |
1191 | /* If set, then this is a Consumer Electronics (CE) video format. Such formats | ||
1192 | * differ from other formats (commonly called IT formats) in that if RGB | ||
1193 | * encoding is used then by default the RGB values use limited range (i.e. | ||
1194 | * use the range 16-235) as opposed to 0-255. All formats defined in CEA-861 | ||
1195 | * except for the 640x480 format are CE formats. */ | ||
1196 | #define V4L2_DV_FL_IS_CE_VIDEO (1 << 4) | ||
1190 | 1197 | ||
1191 | /* A few useful defines to calculate the total blanking and frame sizes */ | 1198 | /* A few useful defines to calculate the total blanking and frame sizes */ |
1192 | #define V4L2_DV_BT_BLANKING_WIDTH(bt) \ | 1199 | #define V4L2_DV_BT_BLANKING_WIDTH(bt) \ |
@@ -1456,6 +1463,7 @@ struct v4l2_querymenu { | |||
1456 | #define V4L2_CTRL_FLAG_WRITE_ONLY 0x0040 | 1463 | #define V4L2_CTRL_FLAG_WRITE_ONLY 0x0040 |
1457 | #define V4L2_CTRL_FLAG_VOLATILE 0x0080 | 1464 | #define V4L2_CTRL_FLAG_VOLATILE 0x0080 |
1458 | #define V4L2_CTRL_FLAG_HAS_PAYLOAD 0x0100 | 1465 | #define V4L2_CTRL_FLAG_HAS_PAYLOAD 0x0100 |
1466 | #define V4L2_CTRL_FLAG_EXECUTE_ON_WRITE 0x0200 | ||
1459 | 1467 | ||
1460 | /* Query flags, to be ORed with the control ID */ | 1468 | /* Query flags, to be ORed with the control ID */ |
1461 | #define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000 | 1469 | #define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000 |
@@ -1841,8 +1849,8 @@ struct v4l2_mpeg_vbi_fmt_ivtv { | |||
1841 | */ | 1849 | */ |
1842 | struct v4l2_plane_pix_format { | 1850 | struct v4l2_plane_pix_format { |
1843 | __u32 sizeimage; | 1851 | __u32 sizeimage; |
1844 | __u16 bytesperline; | 1852 | __u32 bytesperline; |
1845 | __u16 reserved[7]; | 1853 | __u16 reserved[6]; |
1846 | } __attribute__ ((packed)); | 1854 | } __attribute__ ((packed)); |
1847 | 1855 | ||
1848 | /** | 1856 | /** |
diff --git a/include/uapi/linux/xilinx-v4l2-controls.h b/include/uapi/linux/xilinx-v4l2-controls.h new file mode 100644 index 000000000000..fb495b91e800 --- /dev/null +++ b/include/uapi/linux/xilinx-v4l2-controls.h | |||
@@ -0,0 +1,73 @@ | |||
1 | /* | ||
2 | * Xilinx Controls Header | ||
3 | * | ||
4 | * Copyright (C) 2013-2015 Ideas on Board | ||
5 | * Copyright (C) 2013-2015 Xilinx, Inc. | ||
6 | * | ||
7 | * Contacts: Hyun Kwon <hyun.kwon@xilinx.com> | ||
8 | * Laurent Pinchart <laurent.pinchart@ideasonboard.com> | ||
9 | * | ||
10 | * This software is licensed under the terms of the GNU General Public | ||
11 | * License version 2, as published by the Free Software Foundation, and | ||
12 | * may be copied, distributed, and modified under those terms. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | */ | ||
19 | |||
20 | #ifndef __UAPI_XILINX_V4L2_CONTROLS_H__ | ||
21 | #define __UAPI_XILINX_V4L2_CONTROLS_H__ | ||
22 | |||
23 | #include <linux/v4l2-controls.h> | ||
24 | |||
25 | #define V4L2_CID_XILINX_OFFSET 0xc000 | ||
26 | #define V4L2_CID_XILINX_BASE (V4L2_CID_USER_BASE + V4L2_CID_XILINX_OFFSET) | ||
27 | |||
28 | /* | ||
29 | * Private Controls for Xilinx Video IPs | ||
30 | */ | ||
31 | |||
32 | /* | ||
33 | * Xilinx TPG Video IP | ||
34 | */ | ||
35 | |||
36 | #define V4L2_CID_XILINX_TPG (V4L2_CID_USER_BASE + 0xc000) | ||
37 | |||
38 | /* Draw cross hairs */ | ||
39 | #define V4L2_CID_XILINX_TPG_CROSS_HAIRS (V4L2_CID_XILINX_TPG + 1) | ||
40 | /* Enable a moving box */ | ||
41 | #define V4L2_CID_XILINX_TPG_MOVING_BOX (V4L2_CID_XILINX_TPG + 2) | ||
42 | /* Mask out a color component */ | ||
43 | #define V4L2_CID_XILINX_TPG_COLOR_MASK (V4L2_CID_XILINX_TPG + 3) | ||
44 | /* Enable a stuck pixel feature */ | ||
45 | #define V4L2_CID_XILINX_TPG_STUCK_PIXEL (V4L2_CID_XILINX_TPG + 4) | ||
46 | /* Enable a noisy output */ | ||
47 | #define V4L2_CID_XILINX_TPG_NOISE (V4L2_CID_XILINX_TPG + 5) | ||
48 | /* Enable the motion feature */ | ||
49 | #define V4L2_CID_XILINX_TPG_MOTION (V4L2_CID_XILINX_TPG + 6) | ||
50 | /* Configure the motion speed of moving patterns */ | ||
51 | #define V4L2_CID_XILINX_TPG_MOTION_SPEED (V4L2_CID_XILINX_TPG + 7) | ||
52 | /* The row of horizontal cross hair location */ | ||
53 | #define V4L2_CID_XILINX_TPG_CROSS_HAIR_ROW (V4L2_CID_XILINX_TPG + 8) | ||
54 | /* The colum of vertical cross hair location */ | ||
55 | #define V4L2_CID_XILINX_TPG_CROSS_HAIR_COLUMN (V4L2_CID_XILINX_TPG + 9) | ||
56 | /* Set starting point of sine wave for horizontal component */ | ||
57 | #define V4L2_CID_XILINX_TPG_ZPLATE_HOR_START (V4L2_CID_XILINX_TPG + 10) | ||
58 | /* Set speed of the horizontal component */ | ||
59 | #define V4L2_CID_XILINX_TPG_ZPLATE_HOR_SPEED (V4L2_CID_XILINX_TPG + 11) | ||
60 | /* Set starting point of sine wave for vertical component */ | ||
61 | #define V4L2_CID_XILINX_TPG_ZPLATE_VER_START (V4L2_CID_XILINX_TPG + 12) | ||
62 | /* Set speed of the vertical component */ | ||
63 | #define V4L2_CID_XILINX_TPG_ZPLATE_VER_SPEED (V4L2_CID_XILINX_TPG + 13) | ||
64 | /* Moving box size */ | ||
65 | #define V4L2_CID_XILINX_TPG_BOX_SIZE (V4L2_CID_XILINX_TPG + 14) | ||
66 | /* Moving box color */ | ||
67 | #define V4L2_CID_XILINX_TPG_BOX_COLOR (V4L2_CID_XILINX_TPG + 15) | ||
68 | /* Upper limit count of generated stuck pixels */ | ||
69 | #define V4L2_CID_XILINX_TPG_STUCK_PIXEL_THRESH (V4L2_CID_XILINX_TPG + 16) | ||
70 | /* Noise level */ | ||
71 | #define V4L2_CID_XILINX_TPG_NOISE_GAIN (V4L2_CID_XILINX_TPG + 17) | ||
72 | |||
73 | #endif /* __UAPI_XILINX_V4L2_CONTROLS_H__ */ | ||