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authorDave Airlie <airlied@gmail.com>2014-08-07 05:53:22 -0400
committerDave Airlie <airlied@gmail.com>2014-08-07 05:53:22 -0400
commitfa1d0ee69ca8c123dd791d52830a2e146985ce85 (patch)
treef8c60a43cd9de72939d8fffe00f64b820ddd0442 /include/uapi/drm
parent0c6287ec12fa8f7e295a6ebc5fd331647c5a5469 (diff)
parentef70728c7a6571a1a7115031e932b811f1740b2e (diff)
Merge tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/tegra: Changes for v3.17-rc1 Mostly some cleanup all over the place. Pitch alignment limitations of the display controller are now honored and job submission is 64-bit safe. The SOR output (used for eDP) properly configures sync signal polarities according to the display mode rather than hard-coding them to some value and the number of bits per color is now taken from the panel rather than hard-coded to properly support 24-bit vs. 18-bit panels. The DSI controller now properly supports non-continuous clock mode. GEM objects can now have their flags and tiling mode modified via IOCTLs to allow buffers imported from Nouveau to be properly displayed. Newer generations of the Tegra display controller can also detile block linear buffers at scan-out time. Finally the driver now properly exports MODULE_DEVICE_TABLEs to allow it to be automatically loaded when built as a module. * tag 'drm/tegra/for-3.17-rc1' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: add MODULE_DEVICE_TABLEs drm/tegra: dc - Reset controller on driver remove drm/tegra: Properly align stride for framebuffers drm/tegra: sor - Configure proper sync polarities drm/tegra: sor - Use bits-per-color from panel drm/tegra: Make job submission 64-bit safe drm/tegra: Allow non-authenticated processes to create buffer objects drm/tegra: Add SET/GET_FLAGS IOCTLs drm/tegra: Add SET/GET_TILING IOCTLs drm/tegra: Implement more tiling modes drm/tegra: dsi - Handle non-continuous clock flag drm/tegra: sor - missing unlock on error
Diffstat (limited to 'include/uapi/drm')
-rw-r--r--include/uapi/drm/tegra_drm.h46
1 files changed, 46 insertions, 0 deletions
diff --git a/include/uapi/drm/tegra_drm.h b/include/uapi/drm/tegra_drm.h
index b75482112428..c15d781ecc0f 100644
--- a/include/uapi/drm/tegra_drm.h
+++ b/include/uapi/drm/tegra_drm.h
@@ -129,6 +129,44 @@ struct drm_tegra_submit {
129 __u32 reserved[5]; /* future expansion */ 129 __u32 reserved[5]; /* future expansion */
130}; 130};
131 131
132#define DRM_TEGRA_GEM_TILING_MODE_PITCH 0
133#define DRM_TEGRA_GEM_TILING_MODE_TILED 1
134#define DRM_TEGRA_GEM_TILING_MODE_BLOCK 2
135
136struct drm_tegra_gem_set_tiling {
137 /* input */
138 __u32 handle;
139 __u32 mode;
140 __u32 value;
141 __u32 pad;
142};
143
144struct drm_tegra_gem_get_tiling {
145 /* input */
146 __u32 handle;
147 /* output */
148 __u32 mode;
149 __u32 value;
150 __u32 pad;
151};
152
153#define DRM_TEGRA_GEM_BOTTOM_UP (1 << 0)
154#define DRM_TEGRA_GEM_FLAGS (DRM_TEGRA_GEM_BOTTOM_UP)
155
156struct drm_tegra_gem_set_flags {
157 /* input */
158 __u32 handle;
159 /* output */
160 __u32 flags;
161};
162
163struct drm_tegra_gem_get_flags {
164 /* input */
165 __u32 handle;
166 /* output */
167 __u32 flags;
168};
169
132#define DRM_TEGRA_GEM_CREATE 0x00 170#define DRM_TEGRA_GEM_CREATE 0x00
133#define DRM_TEGRA_GEM_MMAP 0x01 171#define DRM_TEGRA_GEM_MMAP 0x01
134#define DRM_TEGRA_SYNCPT_READ 0x02 172#define DRM_TEGRA_SYNCPT_READ 0x02
@@ -139,6 +177,10 @@ struct drm_tegra_submit {
139#define DRM_TEGRA_GET_SYNCPT 0x07 177#define DRM_TEGRA_GET_SYNCPT 0x07
140#define DRM_TEGRA_SUBMIT 0x08 178#define DRM_TEGRA_SUBMIT 0x08
141#define DRM_TEGRA_GET_SYNCPT_BASE 0x09 179#define DRM_TEGRA_GET_SYNCPT_BASE 0x09
180#define DRM_TEGRA_GEM_SET_TILING 0x0a
181#define DRM_TEGRA_GEM_GET_TILING 0x0b
182#define DRM_TEGRA_GEM_SET_FLAGS 0x0c
183#define DRM_TEGRA_GEM_GET_FLAGS 0x0d
142 184
143#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create) 185#define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
144#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap) 186#define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
@@ -150,5 +192,9 @@ struct drm_tegra_submit {
150#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt) 192#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)
151#define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit) 193#define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)
152#define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base) 194#define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base)
195#define DRM_IOCTL_TEGRA_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_TILING, struct drm_tegra_gem_set_tiling)
196#define DRM_IOCTL_TEGRA_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_TILING, struct drm_tegra_gem_get_tiling)
197#define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags)
198#define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags)
153 199
154#endif 200#endif