diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2013-02-11 06:06:35 -0500 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2013-02-11 06:06:35 -0500 |
commit | d0c65252c4fdd306f2dbcf5c14181001bfdbe70e (patch) | |
tree | 8147240ba0160e9558fd014cccb329c0b6f369ea /include/sound | |
parent | 1b4327dced27fdddc38b938e393f8e9dc7bd8f66 (diff) | |
parent | e43fc6af2538a7a30e695227928eed8a29aa4f63 (diff) |
Merge remote-tracking branch 'asoc/topic/fsi' into asoc-next
Diffstat (limited to 'include/sound')
-rw-r--r-- | include/sound/sh_fsi.h | 70 |
1 files changed, 4 insertions, 66 deletions
diff --git a/include/sound/sh_fsi.h b/include/sound/sh_fsi.h index cc1c919c6436..7a9710b4b799 100644 --- a/include/sound/sh_fsi.h +++ b/include/sound/sh_fsi.h | |||
@@ -11,82 +11,20 @@ | |||
11 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | |||
15 | #define FSI_PORT_A 0 | ||
16 | #define FSI_PORT_B 1 | ||
17 | |||
18 | #include <linux/clk.h> | 14 | #include <linux/clk.h> |
19 | #include <sound/soc.h> | 15 | #include <sound/soc.h> |
20 | 16 | ||
21 | /* | 17 | /* |
22 | * flags format | 18 | * flags |
23 | * | ||
24 | * 0x00000CBA | ||
25 | * | ||
26 | * A: inversion | ||
27 | * B: format mode | ||
28 | * C: chip specific | ||
29 | * D: clock selecter if master mode | ||
30 | */ | 19 | */ |
31 | 20 | #define SH_FSI_FMT_SPDIF (1 << 0) /* spdif for HDMI */ | |
32 | /* A: clock inversion */ | 21 | #define SH_FSI_ENABLE_STREAM_MODE (1 << 1) /* for 16bit data */ |
33 | #define SH_FSI_INVERSION_MASK 0x0000000F | 22 | #define SH_FSI_CLK_CPG (1 << 2) /* FSIxCK + FSI-DIV */ |
34 | #define SH_FSI_LRM_INV (1 << 0) | ||
35 | #define SH_FSI_BRM_INV (1 << 1) | ||
36 | #define SH_FSI_LRS_INV (1 << 2) | ||
37 | #define SH_FSI_BRS_INV (1 << 3) | ||
38 | |||
39 | /* B: format mode */ | ||
40 | #define SH_FSI_FMT_MASK 0x000000F0 | ||
41 | #define SH_FSI_FMT_DAI (0 << 4) | ||
42 | #define SH_FSI_FMT_SPDIF (1 << 4) | ||
43 | |||
44 | /* C: chip specific */ | ||
45 | #define SH_FSI_OPTION_MASK 0x00000F00 | ||
46 | #define SH_FSI_ENABLE_STREAM_MODE (1 << 8) /* for 16bit data */ | ||
47 | |||
48 | /* D: clock selecter if master mode */ | ||
49 | #define SH_FSI_CLK_MASK 0x0000F000 | ||
50 | #define SH_FSI_CLK_EXTERNAL (0 << 12) | ||
51 | #define SH_FSI_CLK_CPG (1 << 12) /* FSIxCK + FSI-DIV */ | ||
52 | |||
53 | /* | ||
54 | * set_rate return value | ||
55 | * | ||
56 | * see ACKMD/BPFMD on | ||
57 | * ACK_MD (FSI2) | ||
58 | * CKG1 (FSI) | ||
59 | * | ||
60 | * err : return value < 0 | ||
61 | * no change : return value == 0 | ||
62 | * change xMD : return value > 0 | ||
63 | * | ||
64 | * 0x-00000AB | ||
65 | * | ||
66 | * A: ACKMD value | ||
67 | * B: BPFMD value | ||
68 | */ | ||
69 | |||
70 | #define SH_FSI_ACKMD_MASK (0xF << 0) | ||
71 | #define SH_FSI_ACKMD_512 (1 << 0) | ||
72 | #define SH_FSI_ACKMD_256 (2 << 0) | ||
73 | #define SH_FSI_ACKMD_128 (3 << 0) | ||
74 | #define SH_FSI_ACKMD_64 (4 << 0) | ||
75 | #define SH_FSI_ACKMD_32 (5 << 0) | ||
76 | |||
77 | #define SH_FSI_BPFMD_MASK (0xF << 4) | ||
78 | #define SH_FSI_BPFMD_512 (1 << 4) | ||
79 | #define SH_FSI_BPFMD_256 (2 << 4) | ||
80 | #define SH_FSI_BPFMD_128 (3 << 4) | ||
81 | #define SH_FSI_BPFMD_64 (4 << 4) | ||
82 | #define SH_FSI_BPFMD_32 (5 << 4) | ||
83 | #define SH_FSI_BPFMD_16 (6 << 4) | ||
84 | 23 | ||
85 | struct sh_fsi_port_info { | 24 | struct sh_fsi_port_info { |
86 | unsigned long flags; | 25 | unsigned long flags; |
87 | int tx_id; | 26 | int tx_id; |
88 | int rx_id; | 27 | int rx_id; |
89 | int (*set_rate)(struct device *dev, int rate, int enable); | ||
90 | }; | 28 | }; |
91 | 29 | ||
92 | struct sh_fsi_platform_info { | 30 | struct sh_fsi_platform_info { |