diff options
author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2014-06-12 11:36:37 -0400 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2014-07-17 08:36:01 -0400 |
commit | 783c8f4c84451bc444e314a71b447239c6ef6fd9 (patch) | |
tree | ccf8ed545ac850e06d3e781a99769bd0ea43c597 /include/soc | |
parent | 35874f3617b38e0c1f72163407c41d554a8f5939 (diff) |
soc/tegra: Add efuse driver for Tegra
Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124. This
replaces functionality previously provided in arch/arm/mach-tegra, which
is removed in this patch.
While at it, move the only user of the global tegra_revision variable
over to tegra_sku_info.revision and export tegra_fuse_readl() to allow
drivers to read calibration fuses.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/soc')
-rw-r--r-- | include/soc/tegra/fuse.h | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h index 822eb348e107..51ac804deba5 100644 --- a/include/soc/tegra/fuse.h +++ b/include/soc/tegra/fuse.h | |||
@@ -22,6 +22,9 @@ | |||
22 | #define TEGRA114 0x35 | 22 | #define TEGRA114 0x35 |
23 | #define TEGRA124 0x40 | 23 | #define TEGRA124 0x40 |
24 | 24 | ||
25 | #define TEGRA_FUSE_SKU_CALIB_0 0xf0 | ||
26 | #define TEGRA30_FUSE_SATA_CALIB 0x124 | ||
27 | |||
25 | #ifndef __ASSEMBLY__ | 28 | #ifndef __ASSEMBLY__ |
26 | 29 | ||
27 | u32 tegra_read_chipid(void); | 30 | u32 tegra_read_chipid(void); |
@@ -37,11 +40,26 @@ enum tegra_revision { | |||
37 | TEGRA_REVISION_MAX, | 40 | TEGRA_REVISION_MAX, |
38 | }; | 41 | }; |
39 | 42 | ||
43 | struct tegra_sku_info { | ||
44 | int sku_id; | ||
45 | int cpu_process_id; | ||
46 | int cpu_speedo_id; | ||
47 | int cpu_speedo_value; | ||
48 | int cpu_iddq_value; | ||
49 | int core_process_id; | ||
50 | int soc_speedo_id; | ||
51 | int gpu_speedo_id; | ||
52 | int gpu_process_id; | ||
53 | int gpu_speedo_value; | ||
54 | enum tegra_revision revision; | ||
55 | }; | ||
56 | |||
40 | u32 tegra_read_straps(void); | 57 | u32 tegra_read_straps(void); |
41 | u32 tegra_read_chipid(void); | 58 | u32 tegra_read_chipid(void); |
42 | void tegra_init_fuse(void); | 59 | void tegra_init_fuse(void); |
60 | int tegra_fuse_readl(unsigned long offset, u32 *value); | ||
43 | 61 | ||
44 | extern enum tegra_revision tegra_revision; | 62 | extern struct tegra_sku_info tegra_sku_info; |
45 | 63 | ||
46 | #if defined(CONFIG_TEGRA20_APB_DMA) | 64 | #if defined(CONFIG_TEGRA20_APB_DMA) |
47 | int tegra_apb_readl_using_dma(unsigned long offset, u32 *value); | 65 | int tegra_apb_readl_using_dma(unsigned long offset, u32 *value); |