diff options
author | Laurent Pinchart <laurent.pinchart@ideasonboard.com> | 2014-01-29 08:08:58 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-05-25 11:56:15 -0400 |
commit | c784b1e2ece8a591263050d1f59607547dfad8f3 (patch) | |
tree | 718f6d67e21d1b7d6e739bae9652080428a93621 /include/media | |
parent | 454378923a9b44e26918893fac8bdeb43ae0f57b (diff) |
[media] adv7604: Add sink pads
The ADV7604 has sink pads for its HDMI and analog inputs. Report them.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'include/media')
-rw-r--r-- | include/media/adv7604.h | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/include/media/adv7604.h b/include/media/adv7604.h index b2500baee8ed..6186771c0642 100644 --- a/include/media/adv7604.h +++ b/include/media/adv7604.h | |||
@@ -155,20 +155,19 @@ struct adv7604_platform_data { | |||
155 | u8 i2c_vdp; | 155 | u8 i2c_vdp; |
156 | }; | 156 | }; |
157 | 157 | ||
158 | enum adv7604_input_port { | 158 | enum adv7604_pad { |
159 | ADV7604_INPUT_HDMI_PORT_A, | 159 | ADV7604_PAD_HDMI_PORT_A = 0, |
160 | ADV7604_INPUT_HDMI_PORT_B, | 160 | ADV7604_PAD_HDMI_PORT_B = 1, |
161 | ADV7604_INPUT_HDMI_PORT_C, | 161 | ADV7604_PAD_HDMI_PORT_C = 2, |
162 | ADV7604_INPUT_HDMI_PORT_D, | 162 | ADV7604_PAD_HDMI_PORT_D = 3, |
163 | ADV7604_INPUT_VGA_RGB, | 163 | ADV7604_PAD_VGA_RGB = 4, |
164 | ADV7604_INPUT_VGA_COMP, | 164 | ADV7604_PAD_VGA_COMP = 5, |
165 | /* The source pad is either 1 (ADV7611) or 6 (ADV7604) */ | ||
166 | ADV7604_PAD_SOURCE = 6, | ||
167 | ADV7611_PAD_SOURCE = 1, | ||
168 | ADV7604_PAD_MAX = 7, | ||
165 | }; | 169 | }; |
166 | 170 | ||
167 | #define ADV7604_EDID_PORT_A 0 | ||
168 | #define ADV7604_EDID_PORT_B 1 | ||
169 | #define ADV7604_EDID_PORT_C 2 | ||
170 | #define ADV7604_EDID_PORT_D 3 | ||
171 | |||
172 | #define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000) | 171 | #define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000) |
173 | #define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001) | 172 | #define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001) |
174 | #define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002) | 173 | #define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002) |