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authorJon Arne Jørgensen <jonarne@jonarne.no>2013-08-03 08:19:37 -0400
committerMauro Carvalho Chehab <m.chehab@samsung.com>2013-08-18 07:27:07 -0400
commit2ccf12afe6da2145085056cebaae2149899f4f8c (patch)
treec0043eeca9eedabfc337cbf07461970bff1c160b /include/media
parentb9798bc160968107c82e119f2a59de25f6e70291 (diff)
[media] saa7115: Implement i2c_board_info.platform_data
This patch implements i2c_board_info.platform_data, and some options to override the default initialization table for the GM7113C and SAA7113 chips. Signed-off-by: Jon Arne Jørgensen <jonarne@jonarne.no> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'include/media')
-rw-r--r--include/media/saa7115.h64
1 files changed, 64 insertions, 0 deletions
diff --git a/include/media/saa7115.h b/include/media/saa7115.h
index 407918625c80..e8d512a7592f 100644
--- a/include/media/saa7115.h
+++ b/include/media/saa7115.h
@@ -64,5 +64,69 @@
64#define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */ 64#define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */
65#define SAA7115_FREQ_FL_DOUBLE_ASCLK (1 << 3) /* SA 39, LRDIV, SAA7114/5 only */ 65#define SAA7115_FREQ_FL_DOUBLE_ASCLK (1 << 3) /* SA 39, LRDIV, SAA7114/5 only */
66 66
67/* ===== SAA7113 Config enums ===== */
68
69/* Register 0x08 "Horizontal time constant" [Bit 3..4]:
70 * Should be set to "Fast Locking Mode" according to the datasheet,
71 * and that is the default setting in the gm7113c_init table.
72 * saa7113_init sets this value to "VTR Mode". */
73enum saa7113_r08_htc {
74 SAA7113_HTC_TV_MODE = 0x00,
75 SAA7113_HTC_VTR_MODE, /* Default for saa7113_init */
76 SAA7113_HTC_FAST_LOCKING_MODE = 0x03 /* Default for gm7113c_init */
77};
78
79/* Register 0x10 "Output format selection" [Bit 6..7]:
80 * Defaults to ITU_656 as specified in datasheet. */
81enum saa7113_r10_ofts {
82 SAA7113_OFTS_ITU_656 = 0x0, /* Default */
83 SAA7113_OFTS_VFLAG_BY_VREF,
84 SAA7113_OFTS_VFLAG_BY_DATA_TYPE
85};
86
87/* Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]:
88 * This is used to select what data is output on the RTS0 and RTS1 pins.
89 * RTS1 [Bit 4..7] Defaults to DOT_IN. (This value can not be set for RTS0)
90 * RTS0 [Bit 0..3] Defaults to VIPB in gm7113c_init as specified
91 * in the datasheet, but is set to HREF_HS in the saa7113_init table. */
92enum saa7113_r12_rts {
93 SAA7113_RTS_DOT_IN = 0, /* OBS: Only for RTS1 (Default RTS1) */
94 SAA7113_RTS_VIPB, /* Default RTS0 For gm7113c_init */
95 SAA7113_RTS_GPSW,
96 SAA7115_RTS_HL,
97 SAA7113_RTS_VL,
98 SAA7113_RTS_DL,
99 SAA7113_RTS_PLIN,
100 SAA7113_RTS_HREF_HS, /* Default RTS0 For saa7113_init */
101 SAA7113_RTS_HS,
102 SAA7113_RTS_HQ,
103 SAA7113_RTS_ODD,
104 SAA7113_RTS_VS,
105 SAA7113_RTS_V123,
106 SAA7113_RTS_VGATE,
107 SAA7113_RTS_VREF,
108 SAA7113_RTS_FID
109};
110
111struct saa7115_platform_data {
112 /* saa7113 only: Force the use of the gm7113c_init table,
113 * instead of the old saa7113_init table. */
114 bool saa7113_force_gm7113c_init;
115
116 /* SAA7113/GM7113C Specific configurations */
117 enum saa7113_r08_htc *saa7113_r08_htc; /* [R_08 - Bit 3..4] */
118
119 bool *saa7113_r10_vrln; /* [R_10 - Bit 3]
120 Disabled for gm7113c_init
121 Enabled for saa7113c_init */
122 enum saa7113_r10_ofts *saa7113_r10_ofts; /* [R_10 - Bit 6..7] */
123
124 enum saa7113_r12_rts *saa7113_r12_rts0; /* [R_12 - Bit 0..3] */
125 enum saa7113_r12_rts *saa7113_r12_rts1; /* [R_12 - Bit 4..7] */
126
127 bool *saa7113_r13_adlsb; /* [R_13 - Bit 7]
128 Default disabled */
129};
130
67#endif 131#endif
68 132