V4L/DVB (3711): Add support for VIDIOC_INT_S_CRYSTAL_FREQ internal command.

Some saa7115-based cards use a different crystal frequency and a different
audio clock generation. Add a new VIDIOC_INT_S_CRYSTAL_FREQ command to be
able to set these values.
Also change the default APLL setting to 0. It makes no sense to have the
audio clock independent from the video clock, this can lead to audio/video
synchronization problems. Setting this to 0 is also consistent with the old
saa7114.c source and the way the Hauppauge Windows driver sets it.

Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>

2 files changed, 21 insertions, 1 deletions

diff --git a/include/media/saa7115.h b/include/media/saa7115.h
index 6b4836f3f057..9f0e2285a099 100644
--- a/include/media/saa7115.h
+++ b/include/media/saa7115.h
@@ -1,5 +1,5 @@
 /*
-    saa7115.h - definition for saa7113/4/5 inputs
+    saa7115.h - definition for saa7113/4/5 inputs and frequency flags
 
     Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
 
@@ -33,5 +33,14 @@
 #define SAA7115_SVIDEO2    8
 #define SAA7115_SVIDEO3    9
 
+/* SAA7115 v4l2_crystal_freq frequency values */
+#define SAA7115_FREQ_32_11_MHZ  32110000   /* 32.11 MHz crystal, SAA7114/5 only */
+#define SAA7115_FREQ_24_576_MHZ 24576000   /* 24.576 MHz crystal */
+
+/* SAA7115 v4l2_crystal_freq audio clock control flags */
+#define SAA7115_FREQ_FL_UCGC   (1 << 0)    /* SA 3A[7], UCGC, SAA7115 only */
+#define SAA7115_FREQ_FL_CGCDIV (1 << 1)    /* SA 3A[6], CGCDIV, SAA7115 only */
+#define SAA7115_FREQ_FL_APLL   (1 << 2)    /* SA 3A[3], APLL, SAA7114/5 only */
+
 #endif
 
diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h
index 642520acdfa7..827f7edcd665 100644
--- a/include/media/v4l2-common.h
+++ b/include/media/v4l2-common.h
@@ -211,4 +211,15 @@ struct v4l2_routing {
 #define VIDIOC_INT_S_VIDEO_ROUTING      _IOW ('d', 111, struct v4l2_routing)
 #define VIDIOC_INT_G_VIDEO_ROUTING      _IOR ('d', 112, struct v4l2_routing)
 
+struct v4l2_crystal_freq {
+        u32 freq;       /* frequency in Hz of the crystal */
+        u32 flags;      /* device specific flags */
+};
+
+/* Sets the frequency of the crystal used to generate the clocks.
+   An extra flags field allows device specific configuration regarding
+   clock frequency dividers, etc. If not used, then set flags to 0.
+   If the frequency is not supported, then -EINVAL is returned. */
+#define VIDIOC_INT_S_CRYSTAL_FREQ       _IOW ('d', 113, struct v4l2_crystal_freq)
+
 #endif /* V4L2_COMMON_H_ */