diff options
author | Viresh Kumar <viresh.kumar@st.com> | 2012-04-17 07:15:35 -0400 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2012-04-24 19:37:40 -0400 |
commit | 1f73f31ad6e37df0679f6842b7405d96515ec8b1 (patch) | |
tree | d5a29e66a6025aec943f6cb5357522d6e6c1d4e9 /include/linux | |
parent | f4d8af2e5ae6294d5e2220d3963def6f7ffc0873 (diff) |
clk: Fix typo in comment
CLK_MUX_INDEX_BIT is mistakenly written as CLK_MUX_INDEX_BITWISE in comment. Fix
it.
CLK_GATE_SET_TO_DISABLE is mistakenly written as CLK_GATE_SET_DISABLE in
comment. Fix it.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'include/linux')
-rw-r--r-- | include/linux/clk-provider.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index cb82918d8fe0..8f2148942b87 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h | |||
@@ -159,7 +159,7 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name, | |||
159 | * Clock which can gate its output. Implements .enable & .disable | 159 | * Clock which can gate its output. Implements .enable & .disable |
160 | * | 160 | * |
161 | * Flags: | 161 | * Flags: |
162 | * CLK_GATE_SET_DISABLE - by default this clock sets the bit at bit_idx to | 162 | * CLK_GATE_SET_TO_DISABLE - by default this clock sets the bit at bit_idx to |
163 | * enable the clock. Setting this flag does the opposite: setting the bit | 163 | * enable the clock. Setting this flag does the opposite: setting the bit |
164 | * disable the clock and clearing it enables the clock | 164 | * disable the clock and clearing it enables the clock |
165 | */ | 165 | */ |
@@ -232,7 +232,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name, | |||
232 | * | 232 | * |
233 | * Flags: | 233 | * Flags: |
234 | * CLK_MUX_INDEX_ONE - register index starts at 1, not 0 | 234 | * CLK_MUX_INDEX_ONE - register index starts at 1, not 0 |
235 | * CLK_MUX_INDEX_BITWISE - register index is a single bit (power of two) | 235 | * CLK_MUX_INDEX_BIT - register index is a single bit (power of two) |
236 | */ | 236 | */ |
237 | struct clk_mux { | 237 | struct clk_mux { |
238 | struct clk_hw hw; | 238 | struct clk_hw hw; |