Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (66 commits)
  mmc: add new sdhci-pxa driver for Marvell SoCs
  mmc: make number of mmcblk minors configurable
  mmc_spi: Recover from CRC errors for r/w operation over SPI.
  mmc: sdhci-pltfm: add -pltfm driver for imx35/51
  mmc: sdhci-of-esdhc: factor out common stuff
  mmc: sdhci_pltfm: pass more data on custom init call
  mmc: sdhci: introduce get_ro private write-protect hook
  mmc: sdhci-pltfm: move .h file into appropriate subdir
  mmc: sdhci-pltfm: Add structure for host-specific data
  mmc: fix cb710 kconfig dependency warning
  mmc: cb710: remove debugging printk (info duplicated from mmc-core)
  mmc: cb710: clear irq handler on init() error path
  mmc: cb710: remove unnecessary msleep()
  mmc: cb710: implement get_cd() callback
  mmc: cb710: partially demystify clock selection
  mmc: add a file to debugfs for changing host clock at runtime
  mmc: sdhci: allow for eMMC 74 clock generation by controller
  mmc: sdhci: highspeed: check for mmc as well as sd cards
  mmc: sdhci: Add Moorestown device support
  mmc: sdhci: Intel Medfield support
  ...

7 files changed, 212 insertions, 7 deletions

diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 6b7525099e56..8ce082781ccb 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -48,6 +48,7 @@ struct mmc_ext_csd {
         unsigned int            sa_timeout;             /* Units: 100ns */
         unsigned int            hs_max_dtr;
         unsigned int            sectors;
+        unsigned int            card_type;
         unsigned int            hc_erase_size;          /* In sectors */
         unsigned int            hc_erase_timeout;       /* In milliseconds */
         unsigned int            sec_trim_mult;  /* Secure trim multiplier  */
@@ -113,6 +114,7 @@ struct mmc_card {
 #define MMC_STATE_READONLY      (1<<1)          /* card is read-only */
 #define MMC_STATE_HIGHSPEED     (1<<2)          /* card is in high speed mode */
 #define MMC_STATE_BLOCKADDR     (1<<3)          /* card uses block-addressing */
+#define MMC_STATE_HIGHSPEED_DDR (1<<4)          /* card is in high speed mode */
         unsigned int            quirks;         /* card quirks */
 #define MMC_QUIRK_LENIENT_FN0   (1<<0)          /* allow SDIO FN0 writes outside of the VS CCCR range */
 #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1)    /* use func->cur_blksize */
@@ -154,11 +156,13 @@ struct mmc_card {
 #define mmc_card_readonly(c)    ((c)->state & MMC_STATE_READONLY)
 #define mmc_card_highspeed(c)   ((c)->state & MMC_STATE_HIGHSPEED)
 #define mmc_card_blockaddr(c)   ((c)->state & MMC_STATE_BLOCKADDR)
+#define mmc_card_ddr_mode(c)    ((c)->state & MMC_STATE_HIGHSPEED_DDR)
 
 #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT)
 #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY)
 #define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED)
 #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR)
+#define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR)
 
 static inline int mmc_card_lenient_fn0(const struct mmc_card *c)
 {
@@ -173,6 +177,8 @@ static inline int mmc_blksz_for_byte_mode(const struct mmc_card *c)
 #define mmc_card_name(c)        ((c)->cid.prod_name)
 #define mmc_card_id(c)          (dev_name(&(c)->dev))
 
+#define mmc_dev_to_card(d)      container_of(d, struct mmc_card, dev)
+
 #define mmc_list_to_card(l)     container_of(l, struct mmc_card, node)
 #define mmc_get_drvdata(c)      dev_get_drvdata(&(c)->dev)
 #define mmc_set_drvdata(c,d)    dev_set_drvdata(&(c)->dev, d)
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 7429033acb66..64e013f1cfb8 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -153,6 +153,8 @@ extern int mmc_can_secure_erase_trim(struct mmc_card *card);
 extern int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from,
                                    unsigned int nr);
 
+extern int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen);
+
 extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *);
 extern unsigned int mmc_align_data_size(struct mmc_card *, unsigned int);
 
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 1575b52c3bfa..6d87f68ce4b6 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -50,6 +50,12 @@ struct mmc_ios {
 #define MMC_TIMING_LEGACY       0
 #define MMC_TIMING_MMC_HS       1
 #define MMC_TIMING_SD_HS        2
+
+        unsigned char   ddr;                    /* dual data rate used */
+
+#define MMC_SDR_MODE            0
+#define MMC_1_2V_DDR_MODE       1
+#define MMC_1_8V_DDR_MODE       2
 };
 
 struct mmc_host_ops {
@@ -123,6 +129,7 @@ struct mmc_host {
         const struct mmc_host_ops *ops;
         unsigned int            f_min;
         unsigned int            f_max;
+        unsigned int            f_init;
         u32                     ocr_avail;
         struct notifier_block   pm_notify;
 
@@ -157,13 +164,16 @@ struct mmc_host {
 #define MMC_CAP_NONREMOVABLE    (1 << 8)        /* Nonremovable e.g. eMMC */
 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)        /* Waits while card is busy */
 #define MMC_CAP_ERASE           (1 << 10)       /* Allow erase/trim commands */
+#define MMC_CAP_1_8V_DDR        (1 << 11)       /* can support */
+                                                /* DDR mode at 1.8V */
+#define MMC_CAP_1_2V_DDR        (1 << 12)       /* can support */
+                                                /* DDR mode at 1.2V */
 
         mmc_pm_flag_t           pm_caps;        /* supported pm features */
 
         /* host specific block data */
         unsigned int            max_seg_size;   /* see blk_queue_max_segment_size */
-        unsigned short          max_hw_segs;    /* see blk_queue_max_hw_segments */
-        unsigned short          max_phys_segs;  /* see blk_queue_max_phys_segments */
+        unsigned short          max_segs;       /* see blk_queue_max_segments */
         unsigned short          unused;
         unsigned int            max_req_size;   /* maximum number of bytes in one req */
         unsigned int            max_blk_size;   /* maximum size of one mmc block */
@@ -212,6 +222,10 @@ struct mmc_host {
         struct led_trigger      *led;           /* activity led */
 #endif
 
+#ifdef CONFIG_REGULATOR
+        bool                    regulator_enabled; /* regulator state */
+#endif
+
         struct dentry           *debugfs_root;
 
         unsigned long           private[0] ____cacheline_aligned;
@@ -236,8 +250,8 @@ static inline void *mmc_priv(struct mmc_host *host)
 extern int mmc_suspend_host(struct mmc_host *);
 extern int mmc_resume_host(struct mmc_host *);
 
-extern void mmc_power_save_host(struct mmc_host *host);
-extern void mmc_power_restore_host(struct mmc_host *host);
+extern int mmc_power_save_host(struct mmc_host *host);
+extern int mmc_power_restore_host(struct mmc_host *host);
 
 extern void mmc_detect_change(struct mmc_host *, unsigned long delay);
 extern void mmc_request_done(struct mmc_host *, struct mmc_request *);
@@ -250,8 +264,24 @@ static inline void mmc_signal_sdio_irq(struct mmc_host *host)
 
 struct regulator;
 
+#ifdef CONFIG_REGULATOR
 int mmc_regulator_get_ocrmask(struct regulator *supply);
-int mmc_regulator_set_ocr(struct regulator *supply, unsigned short vdd_bit);
+int mmc_regulator_set_ocr(struct mmc_host *mmc,
+                        struct regulator *supply,
+                        unsigned short vdd_bit);
+#else
+static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
+{
+        return 0;
+}
+
+static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
+                                 struct regulator *supply,
+                                 unsigned short vdd_bit)
+{
+        return 0;
+}
+#endif
 
 int mmc_card_awake(struct mmc_host *host);
 int mmc_card_sleep(struct mmc_host *host);
@@ -268,5 +298,13 @@ static inline void mmc_set_disable_delay(struct mmc_host *host,
         host->disable_delay = disable_delay;
 }
 
+/* Module parameter */
+extern int mmc_assume_removable;
+
+static inline int mmc_card_is_removable(struct mmc_host *host)
+{
+        return !(host->caps & MMC_CAP_NONREMOVABLE) && mmc_assume_removable;
+}
+
 #endif
 
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index dd11ae51fb68..956fbd877692 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -277,11 +277,19 @@ struct _mmc_csd {
 
 #define EXT_CSD_CARD_TYPE_26    (1<<0)  /* Card can run at 26MHz */
 #define EXT_CSD_CARD_TYPE_52    (1<<1)  /* Card can run at 52MHz */
-#define EXT_CSD_CARD_TYPE_MASK  0x3     /* Mask out reserved and DDR bits */
+#define EXT_CSD_CARD_TYPE_MASK  0xF     /* Mask out reserved bits */
+#define EXT_CSD_CARD_TYPE_DDR_1_8V  (1<<2)   /* Card can run at 52MHz */
+                                             /* DDR mode @1.8V or 3V I/O */
+#define EXT_CSD_CARD_TYPE_DDR_1_2V  (1<<3)   /* Card can run at 52MHz */
+                                             /* DDR mode @1.2V I/O */
+#define EXT_CSD_CARD_TYPE_DDR_52       (EXT_CSD_CARD_TYPE_DDR_1_8V  \
+                                        | EXT_CSD_CARD_TYPE_DDR_1_2V)
 
 #define EXT_CSD_BUS_WIDTH_1     0       /* Card is in 1 bit mode */
 #define EXT_CSD_BUS_WIDTH_4     1       /* Card is in 4 bit mode */
 #define EXT_CSD_BUS_WIDTH_8     2       /* Card is in 8 bit mode */
+#define EXT_CSD_DDR_BUS_WIDTH_4 5       /* Card is in 4 bit DDR mode */
+#define EXT_CSD_DDR_BUS_WIDTH_8 6       /* Card is in 8 bit DDR mode */
 
 #define EXT_CSD_SEC_ER_EN       BIT(0)
 #define EXT_CSD_SEC_BD_BLK_EN   BIT(2)
diff --git a/include/linux/sdhci-pltfm.h b/include/linux/mmc/sdhci-pltfm.h
index 0239bd70241e..548d59d404cb 100644
--- a/include/linux/sdhci-pltfm.h
+++ b/include/linux/mmc/sdhci-pltfm.h
@@ -28,7 +28,7 @@ struct sdhci_host;
 struct sdhci_pltfm_data {
         struct sdhci_ops *ops;
         unsigned int quirks;
-        int (*init)(struct sdhci_host *host);
+        int (*init)(struct sdhci_host *host, struct sdhci_pltfm_data *pdata);
         void (*exit)(struct sdhci_host *host);
 };
 
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
new file mode 100644
index 000000000000..1fdc673f2396
--- /dev/null
+++ b/include/linux/mmc/sdhci.h
@@ -0,0 +1,144 @@
+/*
+ *  linux/include/linux/mmc/sdhci.h - Secure Digital Host Controller Interface
+ *
+ *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+#ifndef __SDHCI_H
+#define __SDHCI_H
+
+#include <linux/scatterlist.h>
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <linux/io.h>
+#include <linux/mmc/host.h>
+
+struct sdhci_host {
+        /* Data set by hardware interface driver */
+        const char *hw_name;    /* Hardware bus name */
+
+        unsigned int quirks;    /* Deviations from spec. */
+
+/* Controller doesn't honor resets unless we touch the clock register */
+#define SDHCI_QUIRK_CLOCK_BEFORE_RESET                  (1<<0)
+/* Controller has bad caps bits, but really supports DMA */
+#define SDHCI_QUIRK_FORCE_DMA                           (1<<1)
+/* Controller doesn't like to be reset when there is no card inserted. */
+#define SDHCI_QUIRK_NO_CARD_NO_RESET                    (1<<2)
+/* Controller doesn't like clearing the power reg before a change */
+#define SDHCI_QUIRK_SINGLE_POWER_WRITE                  (1<<3)
+/* Controller has flaky internal state so reset it on each ios change */
+#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS               (1<<4)
+/* Controller has an unusable DMA engine */
+#define SDHCI_QUIRK_BROKEN_DMA                          (1<<5)
+/* Controller has an unusable ADMA engine */
+#define SDHCI_QUIRK_BROKEN_ADMA                         (1<<6)
+/* Controller can only DMA from 32-bit aligned addresses */
+#define SDHCI_QUIRK_32BIT_DMA_ADDR                      (1<<7)
+/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
+#define SDHCI_QUIRK_32BIT_DMA_SIZE                      (1<<8)
+/* Controller can only ADMA chunks that are a multiple of 32 bits */
+#define SDHCI_QUIRK_32BIT_ADMA_SIZE                     (1<<9)
+/* Controller needs to be reset after each request to stay stable */
+#define SDHCI_QUIRK_RESET_AFTER_REQUEST                 (1<<10)
+/* Controller needs voltage and power writes to happen separately */
+#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER             (1<<11)
+/* Controller provides an incorrect timeout value for transfers */
+#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL                  (1<<12)
+/* Controller has an issue with buffer bits for small transfers */
+#define SDHCI_QUIRK_BROKEN_SMALL_PIO                    (1<<13)
+/* Controller does not provide transfer-complete interrupt when not busy */
+#define SDHCI_QUIRK_NO_BUSY_IRQ                         (1<<14)
+/* Controller has unreliable card detection */
+#define SDHCI_QUIRK_BROKEN_CARD_DETECTION               (1<<15)
+/* Controller reports inverted write-protect state */
+#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT              (1<<16)
+/* Controller has nonstandard clock management */
+#define SDHCI_QUIRK_NONSTANDARD_CLOCK                   (1<<17)
+/* Controller does not like fast PIO transfers */
+#define SDHCI_QUIRK_PIO_NEEDS_DELAY                     (1<<18)
+/* Controller losing signal/interrupt enable states after reset */
+#define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET            (1<<19)
+/* Controller has to be forced to use block size of 2048 bytes */
+#define SDHCI_QUIRK_FORCE_BLK_SZ_2048                   (1<<20)
+/* Controller cannot do multi-block transfers */
+#define SDHCI_QUIRK_NO_MULTIBLOCK                       (1<<21)
+/* Controller can only handle 1-bit data transfers */
+#define SDHCI_QUIRK_FORCE_1_BIT_DATA                    (1<<22)
+/* Controller needs 10ms delay between applying power and clock */
+#define SDHCI_QUIRK_DELAY_AFTER_POWER                   (1<<23)
+/* Controller uses SDCLK instead of TMCLK for data timeouts */
+#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK             (1<<24)
+/* Controller reports wrong base clock capability */
+#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN               (1<<25)
+/* Controller cannot support End Attribute in NOP ADMA descriptor */
+#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC               (1<<26)
+/* Controller is missing device caps. Use caps provided by host */
+#define SDHCI_QUIRK_MISSING_CAPS                        (1<<27)
+/* Controller uses Auto CMD12 command to stop the transfer */
+#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12              (1<<28)
+/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
+#define SDHCI_QUIRK_NO_HISPD_BIT                        (1<<29)
+
+        int irq;                /* Device IRQ */
+        void __iomem *ioaddr;   /* Mapped address */
+
+        const struct sdhci_ops *ops;    /* Low level hw interface */
+
+        struct regulator *vmmc; /* Power regulator */
+
+        /* Internal data */
+        struct mmc_host *mmc;   /* MMC structure */
+        u64 dma_mask;           /* custom DMA mask */
+
+#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
+        struct led_classdev led;        /* LED control */
+        char led_name[32];
+#endif
+
+        spinlock_t lock;        /* Mutex */
+
+        int flags;              /* Host attributes */
+#define SDHCI_USE_SDMA          (1<<0)  /* Host is SDMA capable */
+#define SDHCI_USE_ADMA          (1<<1)  /* Host is ADMA capable */
+#define SDHCI_REQ_USE_DMA       (1<<2)  /* Use DMA for this req. */
+#define SDHCI_DEVICE_DEAD       (1<<3)  /* Device unresponsive */
+
+        unsigned int version;   /* SDHCI spec. version */
+
+        unsigned int max_clk;   /* Max possible freq (MHz) */
+        unsigned int timeout_clk;       /* Timeout freq (KHz) */
+
+        unsigned int clock;     /* Current clock (MHz) */
+        u8 pwr;                 /* Current voltage */
+
+        struct mmc_request *mrq;        /* Current request */
+        struct mmc_command *cmd;        /* Current command */
+        struct mmc_data *data;  /* Current data request */
+        unsigned int data_early:1;      /* Data finished before cmd */
+
+        struct sg_mapping_iter sg_miter;        /* SG state for PIO */
+        unsigned int blocks;    /* remaining PIO blocks */
+
+        int sg_count;           /* Mapped sg entries */
+
+        u8 *adma_desc;          /* ADMA descriptor table */
+        u8 *align_buffer;       /* Bounce buffer */
+
+        dma_addr_t adma_addr;   /* Mapped ADMA descr. table */
+        dma_addr_t align_addr;  /* Mapped bounce buffer */
+
+        struct tasklet_struct card_tasklet;     /* Tasklet structures */
+        struct tasklet_struct finish_tasklet;
+
+        struct timer_list timer;        /* Timer for timeouts */
+
+        unsigned int caps;      /* Alternative capabilities */
+
+        unsigned long private[0] ____cacheline_aligned;
+};
+#endif /* __SDHCI_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index b4c3d1b50037..30d91838a198 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2430,6 +2430,13 @@
 #define PCI_DEVICE_ID_INTEL_82375       0x0482
 #define PCI_DEVICE_ID_INTEL_82424       0x0483
 #define PCI_DEVICE_ID_INTEL_82378       0x0484
+#define PCI_DEVICE_ID_INTEL_MRST_SD0    0x0807
+#define PCI_DEVICE_ID_INTEL_MRST_SD1    0x0808
+#define PCI_DEVICE_ID_INTEL_MFD_SD      0x0820
+#define PCI_DEVICE_ID_INTEL_MFD_SDIO1   0x0821
+#define PCI_DEVICE_ID_INTEL_MFD_SDIO2   0x0822
+#define PCI_DEVICE_ID_INTEL_MFD_EMMC0   0x0823
+#define PCI_DEVICE_ID_INTEL_MFD_EMMC1   0x0824
 #define PCI_DEVICE_ID_INTEL_I960        0x0960
 #define PCI_DEVICE_ID_INTEL_I960RM      0x0962
 #define PCI_DEVICE_ID_INTEL_8257X_SOL   0x1062