Merge branch 'for-davem' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6

Conflicts:
	drivers/net/wireless/ath/ath9k/ar9003_eeprom.c

3 files changed, 64 insertions, 5 deletions

diff --git a/include/linux/nl80211.h b/include/linux/nl80211.h
index d706bf3badc8..5cfa579df476 100644
--- a/include/linux/nl80211.h
+++ b/include/linux/nl80211.h
@@ -358,11 +358,16 @@
  *      user space application). %NL80211_ATTR_FRAME is used to specify the
  *      frame contents (including header). %NL80211_ATTR_WIPHY_FREQ (and
  *      optionally %NL80211_ATTR_WIPHY_CHANNEL_TYPE) is used to indicate on
- *      which channel the frame is to be transmitted or was received. This
- *      channel has to be the current channel (remain-on-channel or the
- *      operational channel). When called, this operation returns a cookie
- *      (%NL80211_ATTR_COOKIE) that will be included with the TX status event
- *      pertaining to the TX request.
+ *      which channel the frame is to be transmitted or was received. If this
+ *      channel is not the current channel (remain-on-channel or the
+ *      operational channel) the device will switch to the given channel and
+ *      transmit the frame, optionally waiting for a response for the time
+ *      specified using %NL80211_ATTR_DURATION. When called, this operation
+ *      returns a cookie (%NL80211_ATTR_COOKIE) that will be included with the
+ *      TX status event pertaining to the TX request.
+ * @NL80211_CMD_FRAME_WAIT_CANCEL: When an off-channel TX was requested, this
+ *      command may be used with the corresponding cookie to cancel the wait
+ *      time if it is known that it is no longer necessary.
  * @NL80211_CMD_ACTION: Alias for @NL80211_CMD_FRAME for backward compatibility.
  * @NL80211_CMD_FRAME_TX_STATUS: Report TX status of a management frame
  *      transmitted with %NL80211_CMD_FRAME. %NL80211_ATTR_COOKIE identifies
@@ -493,6 +498,8 @@ enum nl80211_commands {
         NL80211_CMD_SET_CHANNEL,
         NL80211_CMD_SET_WDS_PEER,
 
+        NL80211_CMD_FRAME_WAIT_CANCEL,
+
         /* add new commands above here */
 
         /* used to define NL80211_CMD_MAX below */
@@ -828,6 +835,12 @@ enum nl80211_commands {
  *
  * @NL80211_ATTR_MCAST_RATE: Multicast tx rate (in 100 kbps) for IBSS
  *
+ * @NL80211_ATTR_OFFCHANNEL_TX_OK: For management frame TX, the frame may be
+ *      transmitted on another channel when the channel given doesn't match
+ *      the current channel. If the current channel doesn't match and this
+ *      flag isn't set, the frame will be rejected. This is also used as an
+ *      nl80211 capability flag.
+ *
  * @NL80211_ATTR_MAX: highest attribute number currently defined
  * @__NL80211_ATTR_AFTER_LAST: internal use
  */
@@ -1002,6 +1015,8 @@ enum nl80211_attrs {
 
         NL80211_ATTR_MCAST_RATE,
 
+        NL80211_ATTR_OFFCHANNEL_TX_OK,
+
         /* add attributes here, update the policy in nl80211.c */
 
         __NL80211_ATTR_AFTER_LAST,
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 623b704fdc42..9659eff52ca2 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -55,6 +55,10 @@ struct ssb_sprom {
         u8 tri5gl;              /* 5.2GHz TX isolation */
         u8 tri5g;               /* 5.3GHz TX isolation */
         u8 tri5gh;              /* 5.8GHz TX isolation */
+        u8 txpid2g[4];          /* 2GHz TX power index */
+        u8 txpid5gl[4];         /* 4.9 - 5.1GHz TX power index */
+        u8 txpid5g[4];          /* 5.1 - 5.5GHz TX power index */
+        u8 txpid5gh[4];         /* 5.5 - ...GHz TX power index */
         u8 rxpo2g;              /* 2GHz RX power offset */
         u8 rxpo5g;              /* 5GHz RX power offset */
         u8 rssisav2g;           /* 2GHz RSSI params */
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index 11daf9c140e7..489f7b6d61c5 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -299,6 +299,46 @@
 #define  SSB_SPROM4_AGAIN2_SHIFT        0
 #define  SSB_SPROM4_AGAIN3              0xFF00  /* Antenna 3 */
 #define  SSB_SPROM4_AGAIN3_SHIFT        8
+#define SSB_SPROM4_TXPID2G01            0x0062  /* TX Power Index 2GHz */
+#define  SSB_SPROM4_TXPID2G0            0x00FF
+#define  SSB_SPROM4_TXPID2G0_SHIFT      0
+#define  SSB_SPROM4_TXPID2G1            0xFF00
+#define  SSB_SPROM4_TXPID2G1_SHIFT      8
+#define SSB_SPROM4_TXPID2G23            0x0064  /* TX Power Index 2GHz */
+#define  SSB_SPROM4_TXPID2G2            0x00FF
+#define  SSB_SPROM4_TXPID2G2_SHIFT      0
+#define  SSB_SPROM4_TXPID2G3            0xFF00
+#define  SSB_SPROM4_TXPID2G3_SHIFT      8
+#define SSB_SPROM4_TXPID5G01            0x0066  /* TX Power Index 5GHz middle subband */
+#define  SSB_SPROM4_TXPID5G0            0x00FF
+#define  SSB_SPROM4_TXPID5G0_SHIFT      0
+#define  SSB_SPROM4_TXPID5G1            0xFF00
+#define  SSB_SPROM4_TXPID5G1_SHIFT      8
+#define SSB_SPROM4_TXPID5G23            0x0068  /* TX Power Index 5GHz middle subband */
+#define  SSB_SPROM4_TXPID5G2            0x00FF
+#define  SSB_SPROM4_TXPID5G2_SHIFT      0
+#define  SSB_SPROM4_TXPID5G3            0xFF00
+#define  SSB_SPROM4_TXPID5G3_SHIFT      8
+#define SSB_SPROM4_TXPID5GL01           0x006A  /* TX Power Index 5GHz low subband */
+#define  SSB_SPROM4_TXPID5GL0           0x00FF
+#define  SSB_SPROM4_TXPID5GL0_SHIFT     0
+#define  SSB_SPROM4_TXPID5GL1           0xFF00
+#define  SSB_SPROM4_TXPID5GL1_SHIFT     8
+#define SSB_SPROM4_TXPID5GL23           0x006C  /* TX Power Index 5GHz low subband */
+#define  SSB_SPROM4_TXPID5GL2           0x00FF
+#define  SSB_SPROM4_TXPID5GL2_SHIFT     0
+#define  SSB_SPROM4_TXPID5GL3           0xFF00
+#define  SSB_SPROM4_TXPID5GL3_SHIFT     8
+#define SSB_SPROM4_TXPID5GH01           0x006E  /* TX Power Index 5GHz high subband */
+#define  SSB_SPROM4_TXPID5GH0           0x00FF
+#define  SSB_SPROM4_TXPID5GH0_SHIFT     0
+#define  SSB_SPROM4_TXPID5GH1           0xFF00
+#define  SSB_SPROM4_TXPID5GH1_SHIFT     8
+#define SSB_SPROM4_TXPID5GH23           0x0070  /* TX Power Index 5GHz high subband */
+#define  SSB_SPROM4_TXPID5GH2           0x00FF
+#define  SSB_SPROM4_TXPID5GH2_SHIFT     0
+#define  SSB_SPROM4_TXPID5GH3           0xFF00
+#define  SSB_SPROM4_TXPID5GH3_SHIFT     8
 #define SSB_SPROM4_MAXP_BG              0x0080  /* Max Power BG in path 1 */
 #define  SSB_SPROM4_MAXP_BG_MASK        0x00FF  /* Mask for Max Power BG */
 #define  SSB_SPROM4_ITSSI_BG            0xFF00  /* Mask for path 1 itssi_bg */