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authorThomas Gleixner <tglx@cruncher.tec.linutronix.de>2006-05-23 05:50:56 -0400
committerThomas Gleixner <tglx@cruncher.tec.linutronix.de>2006-05-23 05:50:56 -0400
commit2c0a2bed9276ebbec5794edc07f66e21e9a1735c (patch)
treead0fb96624fd92f270d9e5d1cbbff14ffd7921f0 /include/linux
parentdcb0932884b801290efd80fbc37630297b98181f (diff)
[MTD] NAND whitespace and formatting cleanup
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/mtd/nand.h103
1 files changed, 34 insertions, 69 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 05c6ecc07036..014ceefbec0e 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -11,47 +11,11 @@
11 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 * 13 *
14 * Info: 14 * Info:
15 * Contains standard defines and IDs for NAND flash devices 15 * Contains standard defines and IDs for NAND flash devices
16 * 16 *
17 * Changelog: 17 * Changelog:
18 * 01-31-2000 DMW Created 18 * See git changelog.
19 * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers
20 * so it can be used by other NAND flash device
21 * drivers. I also changed the copyright since none
22 * of the original contents of this file are specific
23 * to DoC devices. David can whack me with a baseball
24 * bat later if I did something naughty.
25 * 10-11-2000 SJH Added private NAND flash structure for driver
26 * 10-24-2000 SJH Added prototype for 'nand_scan' function
27 * 10-29-2001 TG changed nand_chip structure to support
28 * hardwarespecific function for accessing control lines
29 * 02-21-2002 TG added support for different read/write adress and
30 * ready/busy line access function
31 * 02-26-2002 TG added chip_delay to nand_chip structure to optimize
32 * command delay times for different chips
33 * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate
34 * defines in jffs2/wbuf.c
35 * 08-07-2002 TG forced bad block location to byte 5 of OOB, even if
36 * CONFIG_MTD_NAND_ECC_JFFS2 is not set
37 * 08-10-2002 TG extensions to nand_chip structure to support HW-ECC
38 *
39 * 08-29-2002 tglx nand_chip structure: data_poi for selecting
40 * internal / fs-driver buffer
41 * support for 6byte/512byte hardware ECC
42 * read_ecc, write_ecc extended for different oob-layout
43 * oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB,
44 * NAND_YAFFS_OOB
45 * 11-25-2002 tglx Added Manufacturer code FUJITSU, NATIONAL
46 * Split manufacturer and device ID structures
47 *
48 * 02-08-2004 tglx added option field to nand structure for chip anomalities
49 * 05-25-2004 tglx added bad block table support, ST-MICRO manufacturer id
50 * update of nand_chip structure description
51 * 01-17-2005 dmarlin added extended commands for AG-AND device and added option
52 * for BBT_AUTO_REFRESH.
53 * 01-20-2005 dmarlin added optional pointer to hardware specific callback for
54 * extra error status checks.
55 */ 19 */
56#ifndef __LINUX_MTD_NAND_H 20#ifndef __LINUX_MTD_NAND_H
57#define __LINUX_MTD_NAND_H 21#define __LINUX_MTD_NAND_H
@@ -68,7 +32,8 @@ extern int nand_scan (struct mtd_info *mtd, int max_chips);
68extern void nand_release (struct mtd_info *mtd); 32extern void nand_release (struct mtd_info *mtd);
69 33
70/* Read raw data from the device without ECC */ 34/* Read raw data from the device without ECC */
71extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen); 35extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from,
36 size_t len, size_t ooblen);
72 37
73 38
74/* The maximum number of NAND chips in an array */ 39/* The maximum number of NAND chips in an array */
@@ -84,7 +49,7 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_
84 * Constants for hardware specific CLE/ALE/NCE function 49 * Constants for hardware specific CLE/ALE/NCE function
85*/ 50*/
86/* Select the chip by setting nCE to low */ 51/* Select the chip by setting nCE to low */
87#define NAND_CTL_SETNCE 1 52#define NAND_CTL_SETNCE 1
88/* Deselect the chip by setting nCE to high */ 53/* Deselect the chip by setting nCE to high */
89#define NAND_CTL_CLRNCE 2 54#define NAND_CTL_CLRNCE 2
90/* Select the command latch by setting CLE to high */ 55/* Select the command latch by setting CLE to high */
@@ -285,19 +250,19 @@ struct nand_hw_control {
285 * is read from the chip status register 250 * is read from the chip status register
286 * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip 251 * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
287 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready 252 * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
288 * @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware 253 * @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware
289 * @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw) 254 * @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw)
290 * @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only 255 * @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
291 * be provided if a hardware ECC is available 256 * be provided if a hardware ECC is available
292 * @erase_cmd: [INTERN] erase command write function, selectable due to AND support 257 * @erase_cmd: [INTERN] erase command write function, selectable due to AND support
293 * @scan_bbt: [REPLACEABLE] function to scan bad block table 258 * @scan_bbt: [REPLACEABLE] function to scan bad block table
294 * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines 259 * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
295 * @eccsize: [INTERN] databytes used per ecc-calculation 260 * @eccsize: [INTERN] databytes used per ecc-calculation
296 * @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step 261 * @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step
297 * @eccsteps: [INTERN] number of ecc calculation steps per page 262 * @eccsteps: [INTERN] number of ecc calculation steps per page
298 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) 263 * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
299 * @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress 264 * @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress
300 * @state: [INTERN] the current state of the NAND device 265 * @state: [INTERN] the current state of the NAND device
301 * @page_shift: [INTERN] number of address bits in a page (column address bits) 266 * @page_shift: [INTERN] number of address bits in a page (column address bits)
302 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock 267 * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
303 * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry 268 * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry
@@ -327,7 +292,7 @@ struct nand_hw_control {
327 292
328struct nand_chip { 293struct nand_chip {
329 void __iomem *IO_ADDR_R; 294 void __iomem *IO_ADDR_R;
330 void __iomem *IO_ADDR_W; 295 void __iomem *IO_ADDR_W;
331 296
332 u_char (*read_byte)(struct mtd_info *mtd); 297 u_char (*read_byte)(struct mtd_info *mtd);
333 void (*write_byte)(struct mtd_info *mtd, u_char byte); 298 void (*write_byte)(struct mtd_info *mtd, u_char byte);
@@ -340,12 +305,12 @@ struct nand_chip {
340 void (*select_chip)(struct mtd_info *mtd, int chip); 305 void (*select_chip)(struct mtd_info *mtd, int chip);
341 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); 306 int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
342 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); 307 int (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
343 void (*hwcontrol)(struct mtd_info *mtd, int cmd); 308 void (*hwcontrol)(struct mtd_info *mtd, int cmd);
344 int (*dev_ready)(struct mtd_info *mtd); 309 int (*dev_ready)(struct mtd_info *mtd);
345 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr); 310 void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
346 int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state); 311 int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
347 int (*calculate_ecc)(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code); 312 int (*calculate_ecc)(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
348 int (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc); 313 int (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
349 void (*enable_hwecc)(struct mtd_info *mtd, int mode); 314 void (*enable_hwecc)(struct mtd_info *mtd, int mode);
350 void (*erase_cmd)(struct mtd_info *mtd, int page); 315 void (*erase_cmd)(struct mtd_info *mtd, int page);
351 int (*scan_bbt)(struct mtd_info *mtd); 316 int (*scan_bbt)(struct mtd_info *mtd);
@@ -353,14 +318,14 @@ struct nand_chip {
353 int eccsize; 318 int eccsize;
354 int eccbytes; 319 int eccbytes;
355 int eccsteps; 320 int eccsteps;
356 int chip_delay; 321 int chip_delay;
357 wait_queue_head_t wq; 322 wait_queue_head_t wq;
358 nand_state_t state; 323 nand_state_t state;
359 int page_shift; 324 int page_shift;
360 int phys_erase_shift; 325 int phys_erase_shift;
361 int bbt_erase_shift; 326 int bbt_erase_shift;
362 int chip_shift; 327 int chip_shift;
363 u_char *data_buf; 328 u_char *data_buf;
364 u_char *oob_buf; 329 u_char *oob_buf;
365 int oobdirty; 330 int oobdirty;
366 u_char *data_poi; 331 u_char *data_poi;
@@ -389,19 +354,19 @@ struct nand_chip {
389#define NAND_MFR_NATIONAL 0x8f 354#define NAND_MFR_NATIONAL 0x8f
390#define NAND_MFR_RENESAS 0x07 355#define NAND_MFR_RENESAS 0x07
391#define NAND_MFR_STMICRO 0x20 356#define NAND_MFR_STMICRO 0x20
392#define NAND_MFR_HYNIX 0xad 357#define NAND_MFR_HYNIX 0xad
393 358
394/** 359/**
395 * struct nand_flash_dev - NAND Flash Device ID Structure 360 * struct nand_flash_dev - NAND Flash Device ID Structure
396 * 361 *
397 * @name: Identify the device type 362 * @name: Identify the device type
398 * @id: device ID code 363 * @id: device ID code
399 * @pagesize: Pagesize in bytes. Either 256 or 512 or 0 364 * @pagesize: Pagesize in bytes. Either 256 or 512 or 0
400 * If the pagesize is 0, then the real pagesize 365 * If the pagesize is 0, then the real pagesize
401 * and the eraseize are determined from the 366 * and the eraseize are determined from the
402 * extended id bytes in the chip 367 * extended id bytes in the chip
403 * @erasesize: Size of an erase block in the flash device. 368 * @erasesize: Size of an erase block in the flash device.
404 * @chipsize: Total chipsize in Mega Bytes 369 * @chipsize: Total chipsize in Mega Bytes
405 * @options: Bitfield to store chip relevant options 370 * @options: Bitfield to store chip relevant options
406 */ 371 */
407struct nand_flash_dev { 372struct nand_flash_dev {
@@ -416,7 +381,7 @@ struct nand_flash_dev {
416/** 381/**
417 * struct nand_manufacturers - NAND Flash Manufacturer ID Structure 382 * struct nand_manufacturers - NAND Flash Manufacturer ID Structure
418 * @name: Manufacturer name 383 * @name: Manufacturer name
419 * @id: manufacturer ID code of device. 384 * @id: manufacturer ID code of device.
420*/ 385*/
421struct nand_manufacturers { 386struct nand_manufacturers {
422 int id; 387 int id;
@@ -456,7 +421,7 @@ struct nand_bbt_descr {
456 int veroffs; 421 int veroffs;
457 uint8_t version[NAND_MAX_CHIPS]; 422 uint8_t version[NAND_MAX_CHIPS];
458 int len; 423 int len;
459 int maxblocks; 424 int maxblocks;
460 int reserved_block_code; 425 int reserved_block_code;
461 uint8_t *pattern; 426 uint8_t *pattern;
462}; 427};
@@ -501,8 +466,8 @@ extern int nand_default_bbt (struct mtd_info *mtd);
501extern int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt); 466extern int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt);
502extern int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt); 467extern int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt);
503extern int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, 468extern int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
504 size_t * retlen, u_char * buf, u_char * oob_buf, 469 size_t * retlen, u_char * buf, u_char * oob_buf,
505 struct nand_oobinfo *oobsel, int flags); 470 struct nand_oobinfo *oobsel, int flags);
506 471
507/* 472/*
508* Constants for oob configuration 473* Constants for oob configuration
@@ -526,7 +491,7 @@ struct platform_nand_chip {
526 int chip_offset; 491 int chip_offset;
527 int nr_partitions; 492 int nr_partitions;
528 struct mtd_partition *partitions; 493 struct mtd_partition *partitions;
529 int chip_delay; 494 int chip_delay;
530 unsigned int options; 495 unsigned int options;
531 void *priv; 496 void *priv;
532}; 497};
@@ -542,8 +507,8 @@ struct platform_nand_chip {
542 * All fields are optional and depend on the hardware driver requirements 507 * All fields are optional and depend on the hardware driver requirements
543 */ 508 */
544struct platform_nand_ctrl { 509struct platform_nand_ctrl {
545 void (*hwcontrol)(struct mtd_info *mtd, int cmd); 510 void (*hwcontrol)(struct mtd_info *mtd, int cmd);
546 int (*dev_ready)(struct mtd_info *mtd); 511 int (*dev_ready)(struct mtd_info *mtd);
547 void (*select_chip)(struct mtd_info *mtd, int chip); 512 void (*select_chip)(struct mtd_info *mtd, int chip);
548 void *priv; 513 void *priv;
549}; 514};