diff options
| author | Alex Williamson <alex.williamson@redhat.com> | 2011-11-02 16:07:15 -0400 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2012-01-06 15:10:26 -0500 |
| commit | cfa4d8cc56853ec945956d182ecb4c99102b110a (patch) | |
| tree | ca29cfe3fa5b15f70ff65d0598a34b17c46ff19e /include/linux | |
| parent | da8d1c8ba4dcb16d60be54b233deca9a7cac98dc (diff) | |
PCI: Fix PRI and PASID consistency
These are extended capabilities, rename and move to proper
group for consistency.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/pci_regs.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index b5d9657f3100..090d3a9f5b26 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h | |||
| @@ -537,7 +537,9 @@ | |||
| 537 | #define PCI_EXT_CAP_ID_ARI 14 | 537 | #define PCI_EXT_CAP_ID_ARI 14 |
| 538 | #define PCI_EXT_CAP_ID_ATS 15 | 538 | #define PCI_EXT_CAP_ID_ATS 15 |
| 539 | #define PCI_EXT_CAP_ID_SRIOV 16 | 539 | #define PCI_EXT_CAP_ID_SRIOV 16 |
| 540 | #define PCI_EXT_CAP_ID_PRI 19 | ||
| 540 | #define PCI_EXT_CAP_ID_LTR 24 | 541 | #define PCI_EXT_CAP_ID_LTR 24 |
| 542 | #define PCI_EXT_CAP_ID_PASID 27 | ||
| 541 | 543 | ||
| 542 | /* Advanced Error Reporting */ | 544 | /* Advanced Error Reporting */ |
| 543 | #define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */ | 545 | #define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */ |
| @@ -664,7 +666,6 @@ | |||
| 664 | #define PCI_ATS_MIN_STU 12 /* shift of minimum STU block */ | 666 | #define PCI_ATS_MIN_STU 12 /* shift of minimum STU block */ |
| 665 | 667 | ||
| 666 | /* Page Request Interface */ | 668 | /* Page Request Interface */ |
| 667 | #define PCI_PRI_CAP 0x13 /* PRI capability ID */ | ||
| 668 | #define PCI_PRI_CONTROL_OFF 0x04 /* Offset of control register */ | 669 | #define PCI_PRI_CONTROL_OFF 0x04 /* Offset of control register */ |
| 669 | #define PCI_PRI_STATUS_OFF 0x06 /* Offset of status register */ | 670 | #define PCI_PRI_STATUS_OFF 0x06 /* Offset of status register */ |
| 670 | #define PCI_PRI_ENABLE 0x0001 /* Enable mask */ | 671 | #define PCI_PRI_ENABLE 0x0001 /* Enable mask */ |
| @@ -676,7 +677,6 @@ | |||
| 676 | #define PCI_PRI_ALLOC_REQ_OFF 0x0c /* Cap offset for max reqs allowed */ | 677 | #define PCI_PRI_ALLOC_REQ_OFF 0x0c /* Cap offset for max reqs allowed */ |
| 677 | 678 | ||
| 678 | /* PASID capability */ | 679 | /* PASID capability */ |
| 679 | #define PCI_PASID_CAP 0x1b /* PASID capability ID */ | ||
| 680 | #define PCI_PASID_CAP_OFF 0x04 /* PASID feature register */ | 680 | #define PCI_PASID_CAP_OFF 0x04 /* PASID feature register */ |
| 681 | #define PCI_PASID_CONTROL_OFF 0x06 /* PASID control register */ | 681 | #define PCI_PASID_CONTROL_OFF 0x06 /* PASID control register */ |
| 682 | #define PCI_PASID_ENABLE 0x01 /* Enable/Supported bit */ | 682 | #define PCI_PASID_ENABLE 0x01 /* Enable/Supported bit */ |