perf, x86: Improve the PEBS ABI

Rename perf_event_attr::precise to perf_event_attr::precise_ip and
widen it to 2 bits. This new field describes the required precision of
the PERF_SAMPLE_IP field:

  0 - SAMPLE_IP can have arbitrary skid
  1 - SAMPLE_IP must have constant skid
  2 - SAMPLE_IP requested to have 0 skid
  3 - SAMPLE_IP must have 0 skid

And modify the Intel PEBS code accordingly. The PEBS implementation
now supports up to precise_ip == 2, where we perform the IP fixup.

Also s/PERF_RECORD_MISC_EXACT/&_IP/ to clarify its meaning, this bit
should be set for each PERF_SAMPLE_IP field known to match the actual
instruction triggering the event.

This new scheme allows for a PEBS mode that uses the buffer for more
than a single event.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Stephane Eranian <eranian@google.com>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 19 insertions, 4 deletions

diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 6be4a0f9137c..23cd0057a681 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -203,9 +203,19 @@ struct perf_event_attr {
                                 enable_on_exec :  1, /* next exec enables     */
                                 task           :  1, /* trace fork/exit       */
                                 watermark      :  1, /* wakeup_watermark      */
-                                precise        :  1, /* OoO invariant counter */
-
-                                __reserved_1   : 48;
+                                /*
+                                 * precise_ip:
+                                 *
+                                 *  0 - SAMPLE_IP can have arbitrary skid
+                                 *  1 - SAMPLE_IP must have constant skid
+                                 *  2 - SAMPLE_IP requested to have 0 skid
+                                 *  3 - SAMPLE_IP must have 0 skid
+                                 *
+                                 *  See also PERF_RECORD_MISC_EXACT_IP
+                                 */
+                                precise_ip     :  2, /* skid constraint       */
+
+                                __reserved_1   : 47;
 
         union {
                 __u32           wakeup_events;    /* wakeup every n events */
@@ -296,7 +306,12 @@ struct perf_event_mmap_page {
 #define PERF_RECORD_MISC_GUEST_KERNEL           (4 << 0)
 #define PERF_RECORD_MISC_GUEST_USER             (5 << 0)
 
-#define PERF_RECORD_MISC_EXACT                  (1 << 14)
+/*
+ * Indicates that the content of PERF_SAMPLE_IP points to
+ * the actual instruction that triggered the event. See also
+ * perf_event_attr::precise_ip.
+ */
+#define PERF_RECORD_MISC_EXACT_IP               (1 << 14)
 /*
  * Reserve the last bit to indicate some extended misc field
  */