PCI: add ID-based ordering enable/disable support

Add support to allow drivers to enable/disable ID-based ordering.  Where
supported, ID-based ordering can significantly improve the latency of
individual requests by preventing them from queueing up behind unrelated
traffic.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

2 files changed, 15 insertions, 0 deletions

diff --git a/include/linux/pci.h b/include/linux/pci.h
index 96f70d7e058d..551ddcb5f940 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -828,6 +828,11 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
         return __pci_enable_wake(dev, state, false, enable);
 }
 
+#define PCI_EXP_IDO_REQUEST     (1<<0)
+#define PCI_EXP_IDO_COMPLETION  (1<<1)
+void pci_enable_ido(struct pci_dev *dev, unsigned long type);
+void pci_disable_ido(struct pci_dev *dev, unsigned long type);
+
 /* For use by arch with custom probe code */
 void set_pcie_port_type(struct pci_dev *pdev);
 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
@@ -1207,6 +1212,14 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
         return 0;
 }
 
+static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type)
+{
+}
+
+static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type)
+{
+}
+
 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
 {
         return -EIO;
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index be01380f798a..d9acf9b99814 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -510,6 +510,8 @@
 #define  PCI_EXP_DEVCAP2_ARI    0x20    /* Alternative Routing-ID */
 #define PCI_EXP_DEVCTL2         40      /* Device Control 2 */
 #define  PCI_EXP_DEVCTL2_ARI    0x20    /* Alternative Routing-ID */
+#define  PCI_EXP_IDO_REQ_EN     0x100   /* ID-based ordering request enable */
+#define  PCI_EXP_IDO_CMP_EN     0x200   /* ID-based ordering completion enable */
 #define PCI_EXP_LNKCTL2         48      /* Link Control 2 */
 #define PCI_EXP_SLTCTL2         56      /* Slot Control 2 */