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authorAristeu Rozanski <aris@redhat.com>2014-06-18 10:05:01 -0400
committerMauro Carvalho Chehab <m.chehab@samsung.com>2014-06-26 14:46:55 -0400
commit7b8278358cc2b453ca6e75eedb3741cdb7e97236 (patch)
treed6bc903a68f1695da152cf31a8a7a70b9d51e490 /include/linux
parentadc61bcd91aa8364efaa496e7a4699950c362c21 (diff)
edac: add DDR4 and RDDR4
Haswell memory controller can make use of DDR4 and Registered DDR4 Cc: tony.luck@intel.com Signed-off-by: Aristeu Rozanski <aris@redhat.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/edac.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/linux/edac.h b/include/linux/edac.h
index 8e6c20af11a2..e1e68da6f35c 100644
--- a/include/linux/edac.h
+++ b/include/linux/edac.h
@@ -194,6 +194,9 @@ static inline char *mc_event_error_type(const unsigned int err_type)
194 * @MEM_DDR3: DDR3 RAM 194 * @MEM_DDR3: DDR3 RAM
195 * @MEM_RDDR3: Registered DDR3 RAM 195 * @MEM_RDDR3: Registered DDR3 RAM
196 * This is a variant of the DDR3 memories. 196 * This is a variant of the DDR3 memories.
197 * @MEM_DDR4: DDR4 RAM
198 * @MEM_RDDR4: Registered DDR4 RAM
199 * This is a variant of the DDR4 memories.
197 */ 200 */
198enum mem_type { 201enum mem_type {
199 MEM_EMPTY = 0, 202 MEM_EMPTY = 0,
@@ -213,6 +216,8 @@ enum mem_type {
213 MEM_XDR, 216 MEM_XDR,
214 MEM_DDR3, 217 MEM_DDR3,
215 MEM_RDDR3, 218 MEM_RDDR3,
219 MEM_DDR4,
220 MEM_RDDR4,
216}; 221};
217 222
218#define MEM_FLAG_EMPTY BIT(MEM_EMPTY) 223#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)