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authorDave Jones <davej@redhat.com>2005-11-21 09:56:52 -0500
committerDave Jones <davej@redhat.com>2005-11-21 09:56:52 -0500
commite7e37ee9c547213d726b29c2510cbb6696050405 (patch)
tree50c45625de666b23f209d79eb1bfae05c64feee9 /include/linux
parentc243f1f1f6545985afcc6adf1fc085729029c3ee (diff)
parentdb93a82fa9d8b4d6e31c227922eaae829253bb88 (diff)
Merge ../linus/
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/cciss_ioctl.h2
-rw-r--r--include/linux/ds17287rtc.h67
-rw-r--r--include/linux/ds1742rtc.h53
-rw-r--r--include/linux/hdreg.h6
-rw-r--r--include/linux/ide.h30
-rw-r--r--include/linux/mm.h2
-rw-r--r--include/linux/pci_ids.h3
-rw-r--r--include/linux/uinput.h13
8 files changed, 140 insertions, 36 deletions
diff --git a/include/linux/cciss_ioctl.h b/include/linux/cciss_ioctl.h
index 424d5e622b43..6e27f42e3a57 100644
--- a/include/linux/cciss_ioctl.h
+++ b/include/linux/cciss_ioctl.h
@@ -10,8 +10,8 @@
10typedef struct _cciss_pci_info_struct 10typedef struct _cciss_pci_info_struct
11{ 11{
12 unsigned char bus; 12 unsigned char bus;
13 unsigned short domain;
14 unsigned char dev_fn; 13 unsigned char dev_fn;
14 unsigned short domain;
15 __u32 board_id; 15 __u32 board_id;
16} cciss_pci_info_struct; 16} cciss_pci_info_struct;
17 17
diff --git a/include/linux/ds17287rtc.h b/include/linux/ds17287rtc.h
new file mode 100644
index 000000000000..c281ba42e28f
--- /dev/null
+++ b/include/linux/ds17287rtc.h
@@ -0,0 +1,67 @@
1/*
2 * ds17287rtc.h - register definitions for the ds1728[57] RTC / CMOS RAM
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * (C) 2003 Guido Guenther <agx@sigxcpu.org>
9 */
10#ifndef __LINUX_DS17287RTC_H
11#define __LINUX_DS17287RTC_H
12
13#include <linux/rtc.h> /* get the user-level API */
14#include <linux/spinlock.h> /* spinlock_t */
15#include <linux/mc146818rtc.h>
16
17/* Register A */
18#define DS_REGA_DV2 0x40 /* countdown chain */
19#define DS_REGA_DV1 0x20 /* oscillator enable */
20#define DS_REGA_DV0 0x10 /* bank select */
21
22/* bank 1 registers */
23#define DS_B1_MODEL 0x40 /* model number byte */
24#define DS_B1_SN1 0x41 /* serial number byte 1 */
25#define DS_B1_SN2 0x42 /* serial number byte 2 */
26#define DS_B1_SN3 0x43 /* serial number byte 3 */
27#define DS_B1_SN4 0x44 /* serial number byte 4 */
28#define DS_B1_SN5 0x45 /* serial number byte 5 */
29#define DS_B1_SN6 0x46 /* serial number byte 6 */
30#define DS_B1_CRC 0x47 /* CRC byte */
31#define DS_B1_CENTURY 0x48 /* Century byte */
32#define DS_B1_DALARM 0x49 /* date alarm */
33#define DS_B1_XCTRL4A 0x4a /* extendec control register 4a */
34#define DS_B1_XCTRL4B 0x4b /* extendec control register 4b */
35#define DS_B1_RTCADDR2 0x4e /* rtc address 2 */
36#define DS_B1_RTCADDR3 0x4f /* rtc address 3 */
37#define DS_B1_RAMLSB 0x50 /* extended ram LSB */
38#define DS_B1_RAMMSB 0x51 /* extended ram MSB */
39#define DS_B1_RAMDPORT 0x53 /* extended ram data port */
40
41/* register details */
42/* extended control register 4a */
43#define DS_XCTRL4A_VRT2 0x80 /* valid ram and time */
44#define DS_XCTRL4A_INCR 0x40 /* increment progress status */
45#define DS_XCTRL4A_BME 0x20 /* burst mode enable */
46#define DS_XCTRL4A_PAB 0x08 /* power active bar ctrl */
47#define DS_XCTRL4A_RF 0x04 /* ram clear flag */
48#define DS_XCTRL4A_WF 0x02 /* wake up alarm flag */
49#define DS_XCTRL4A_KF 0x01 /* kickstart flag */
50
51/* interrupt causes */
52#define DS_XCTRL4A_IFS (DS_XCTRL4A_RF|DS_XCTRL4A_WF|DS_XCTRL4A_KF)
53
54/* extended control register 4b */
55#define DS_XCTRL4B_ABE 0x80 /* auxiliary battery enable */
56#define DS_XCTRL4B_E32K 0x40 /* enable 32.768 kHz Output */
57#define DS_XCTRL4B_CS 0x20 /* crystal select */
58#define DS_XCTRL4B_RCE 0x10 /* ram clear enable */
59#define DS_XCTRL4B_PRS 0x08 /* PAB resec select */
60#define DS_XCTRL4B_RIE 0x04 /* ram clear interrupt enable */
61#define DS_XCTRL4B_WFE 0x02 /* wake up alarm interrupt enable */
62#define DS_XCTRL4B_KFE 0x01 /* kickstart interrupt enable */
63
64/* interrupt enable bits */
65#define DS_XCTRL4B_IFES (DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE)
66
67#endif /* __LINUX_DS17287RTC_H */
diff --git a/include/linux/ds1742rtc.h b/include/linux/ds1742rtc.h
new file mode 100644
index 000000000000..a83cdd1cafc9
--- /dev/null
+++ b/include/linux/ds1742rtc.h
@@ -0,0 +1,53 @@
1/*
2 * ds1742rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
3 *
4 * Copyright (C) 1999-2001 Toshiba Corporation
5 * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
6 *
7 * Permission is hereby granted to copy, modify and redistribute this code
8 * in terms of the GNU Library General Public License, Version 2 or later,
9 * at your option.
10 */
11#ifndef __LINUX_DS1742RTC_H
12#define __LINUX_DS1742RTC_H
13
14#include <asm/ds1742.h>
15
16#define RTC_BRAM_SIZE 0x800
17#define RTC_OFFSET 0x7f8
18
19/*
20 * Register summary
21 */
22#define RTC_CONTROL (RTC_OFFSET + 0)
23#define RTC_CENTURY (RTC_OFFSET + 0)
24#define RTC_SECONDS (RTC_OFFSET + 1)
25#define RTC_MINUTES (RTC_OFFSET + 2)
26#define RTC_HOURS (RTC_OFFSET + 3)
27#define RTC_DAY (RTC_OFFSET + 4)
28#define RTC_DATE (RTC_OFFSET + 5)
29#define RTC_MONTH (RTC_OFFSET + 6)
30#define RTC_YEAR (RTC_OFFSET + 7)
31
32#define RTC_CENTURY_MASK 0x3f
33#define RTC_SECONDS_MASK 0x7f
34#define RTC_DAY_MASK 0x07
35
36/*
37 * Bits in the Control/Century register
38 */
39#define RTC_WRITE 0x80
40#define RTC_READ 0x40
41
42/*
43 * Bits in the Seconds register
44 */
45#define RTC_STOP 0x80
46
47/*
48 * Bits in the Day register
49 */
50#define RTC_BATT_FLAG 0x80
51#define RTC_FREQ_TEST 0x40
52
53#endif /* __LINUX_DS1742RTC_H */
diff --git a/include/linux/hdreg.h b/include/linux/hdreg.h
index b5d660089de4..2b54eac738ea 100644
--- a/include/linux/hdreg.h
+++ b/include/linux/hdreg.h
@@ -80,10 +80,12 @@
80/* 80/*
81 * Define standard taskfile in/out register 81 * Define standard taskfile in/out register
82 */ 82 */
83#define IDE_TASKFILE_STD_OUT_FLAGS 0xFE
84#define IDE_TASKFILE_STD_IN_FLAGS 0xFE 83#define IDE_TASKFILE_STD_IN_FLAGS 0xFE
85#define IDE_HOB_STD_OUT_FLAGS 0x3C
86#define IDE_HOB_STD_IN_FLAGS 0x3C 84#define IDE_HOB_STD_IN_FLAGS 0x3C
85#ifndef __KERNEL__
86#define IDE_TASKFILE_STD_OUT_FLAGS 0xFE
87#define IDE_HOB_STD_OUT_FLAGS 0x3C
88#endif
87 89
88typedef unsigned char task_ioreg_t; 90typedef unsigned char task_ioreg_t;
89typedef unsigned long sata_ioreg_t; 91typedef unsigned long sata_ioreg_t;
diff --git a/include/linux/ide.h b/include/linux/ide.h
index ac8b25fa6506..a39c3c59789d 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -1089,9 +1089,11 @@ enum {
1089 1089
1090/* 1090/*
1091 * Subdrivers support. 1091 * Subdrivers support.
1092 *
1093 * The gendriver.owner field should be set to the module owner of this driver.
1094 * The gendriver.name field should be set to the name of this driver
1092 */ 1095 */
1093typedef struct ide_driver_s { 1096typedef struct ide_driver_s {
1094 struct module *owner;
1095 const char *version; 1097 const char *version;
1096 u8 media; 1098 u8 media;
1097 unsigned supports_dsc_overlap : 1; 1099 unsigned supports_dsc_overlap : 1;
@@ -1199,37 +1201,11 @@ extern u64 ide_get_error_location(ide_drive_t *, char *);
1199 */ 1201 */
1200typedef enum { 1202typedef enum {
1201 ide_wait, /* insert rq at end of list, and wait for it */ 1203 ide_wait, /* insert rq at end of list, and wait for it */
1202 ide_next, /* insert rq immediately after current request */
1203 ide_preempt, /* insert rq in front of current request */ 1204 ide_preempt, /* insert rq in front of current request */
1204 ide_head_wait, /* insert rq in front of current request and wait for it */ 1205 ide_head_wait, /* insert rq in front of current request and wait for it */
1205 ide_end /* insert rq at end of list, but don't wait for it */ 1206 ide_end /* insert rq at end of list, but don't wait for it */
1206} ide_action_t; 1207} ide_action_t;
1207 1208
1208/*
1209 * This function issues a special IDE device request
1210 * onto the request queue.
1211 *
1212 * If action is ide_wait, then the rq is queued at the end of the
1213 * request queue, and the function sleeps until it has been processed.
1214 * This is for use when invoked from an ioctl handler.
1215 *
1216 * If action is ide_preempt, then the rq is queued at the head of
1217 * the request queue, displacing the currently-being-processed
1218 * request and this function returns immediately without waiting
1219 * for the new rq to be completed. This is VERY DANGEROUS, and is
1220 * intended for careful use by the ATAPI tape/cdrom driver code.
1221 *
1222 * If action is ide_next, then the rq is queued immediately after
1223 * the currently-being-processed-request (if any), and the function
1224 * returns without waiting for the new rq to be completed. As above,
1225 * This is VERY DANGEROUS, and is intended for careful use by the
1226 * ATAPI tape/cdrom driver code.
1227 *
1228 * If action is ide_end, then the rq is queued at the end of the
1229 * request queue, and the function returns immediately without waiting
1230 * for the new rq to be completed. This is again intended for careful
1231 * use by the ATAPI tape/cdrom driver code.
1232 */
1233extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t); 1209extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
1234 1210
1235/* 1211/*
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 1013a42d10b1..0986d19be0b7 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -940,7 +940,9 @@ unsigned long max_sane_readahead(unsigned long nr);
940 940
941/* Do stack extension */ 941/* Do stack extension */
942extern int expand_stack(struct vm_area_struct *vma, unsigned long address); 942extern int expand_stack(struct vm_area_struct *vma, unsigned long address);
943#ifdef CONFIG_IA64
943extern int expand_upwards(struct vm_area_struct *vma, unsigned long address); 944extern int expand_upwards(struct vm_area_struct *vma, unsigned long address);
945#endif
944 946
945/* Look up the first VMA which satisfies addr < vm_end, NULL if none. */ 947/* Look up the first VMA which satisfies addr < vm_end, NULL if none. */
946extern struct vm_area_struct * find_vma(struct mm_struct * mm, unsigned long addr); 948extern struct vm_area_struct * find_vma(struct mm_struct * mm, unsigned long addr);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index c99a83f88dc9..1e737e269db9 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -620,6 +620,7 @@
620#define PCI_DEVICE_ID_SI_961 0x0961 620#define PCI_DEVICE_ID_SI_961 0x0961
621#define PCI_DEVICE_ID_SI_962 0x0962 621#define PCI_DEVICE_ID_SI_962 0x0962
622#define PCI_DEVICE_ID_SI_963 0x0963 622#define PCI_DEVICE_ID_SI_963 0x0963
623#define PCI_DEVICE_ID_SI_965 0x0965
623#define PCI_DEVICE_ID_SI_5511 0x5511 624#define PCI_DEVICE_ID_SI_5511 0x5511
624#define PCI_DEVICE_ID_SI_5513 0x5513 625#define PCI_DEVICE_ID_SI_5513 0x5513
625#define PCI_DEVICE_ID_SI_5518 0x5518 626#define PCI_DEVICE_ID_SI_5518 0x5518
@@ -1235,6 +1236,7 @@
1235#define PCI_DEVICE_ID_VIA_8703_51_0 0x3148 1236#define PCI_DEVICE_ID_VIA_8703_51_0 0x3148
1236#define PCI_DEVICE_ID_VIA_8237_SATA 0x3149 1237#define PCI_DEVICE_ID_VIA_8237_SATA 0x3149
1237#define PCI_DEVICE_ID_VIA_XN266 0x3156 1238#define PCI_DEVICE_ID_VIA_XN266 0x3156
1239#define PCI_DEVICE_ID_VIA_6410 0x3164
1238#define PCI_DEVICE_ID_VIA_8754C_0 0x3168 1240#define PCI_DEVICE_ID_VIA_8754C_0 0x3168
1239#define PCI_DEVICE_ID_VIA_8235 0x3177 1241#define PCI_DEVICE_ID_VIA_8235 0x3177
1240#define PCI_DEVICE_ID_VIA_8385_0 0x3188 1242#define PCI_DEVICE_ID_VIA_8385_0 0x3188
@@ -1402,6 +1404,7 @@
1402#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334 1404#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334
1403 1405
1404#define PCI_VENDOR_ID_MARVELL 0x11ab 1406#define PCI_VENDOR_ID_MARVELL 0x11ab
1407#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146
1405#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430 1408#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
1406#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460 1409#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
1407#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480 1410#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480
diff --git a/include/linux/uinput.h b/include/linux/uinput.h
index 84876077027f..0ff7ca68e5c5 100644
--- a/include/linux/uinput.h
+++ b/include/linux/uinput.h
@@ -34,8 +34,7 @@
34#define UINPUT_BUFFER_SIZE 16 34#define UINPUT_BUFFER_SIZE 16
35#define UINPUT_NUM_REQUESTS 16 35#define UINPUT_NUM_REQUESTS 16
36 36
37/* state flags => bit index for {set|clear|test}_bit ops */ 37enum uinput_state { UIST_NEW_DEVICE, UIST_SETUP_COMPLETE, UIST_CREATED };
38#define UIST_CREATED 0
39 38
40struct uinput_request { 39struct uinput_request {
41 int id; 40 int id;
@@ -52,11 +51,12 @@ struct uinput_request {
52 51
53struct uinput_device { 52struct uinput_device {
54 struct input_dev *dev; 53 struct input_dev *dev;
55 unsigned long state; 54 struct semaphore sem;
55 enum uinput_state state;
56 wait_queue_head_t waitq; 56 wait_queue_head_t waitq;
57 unsigned char ready, 57 unsigned char ready;
58 head, 58 unsigned char head;
59 tail; 59 unsigned char tail;
60 struct input_event buff[UINPUT_BUFFER_SIZE]; 60 struct input_event buff[UINPUT_BUFFER_SIZE];
61 61
62 struct uinput_request *requests[UINPUT_NUM_REQUESTS]; 62 struct uinput_request *requests[UINPUT_NUM_REQUESTS];
@@ -91,6 +91,7 @@ struct uinput_ff_erase {
91#define UI_SET_SNDBIT _IOW(UINPUT_IOCTL_BASE, 106, int) 91#define UI_SET_SNDBIT _IOW(UINPUT_IOCTL_BASE, 106, int)
92#define UI_SET_FFBIT _IOW(UINPUT_IOCTL_BASE, 107, int) 92#define UI_SET_FFBIT _IOW(UINPUT_IOCTL_BASE, 107, int)
93#define UI_SET_PHYS _IOW(UINPUT_IOCTL_BASE, 108, char*) 93#define UI_SET_PHYS _IOW(UINPUT_IOCTL_BASE, 108, char*)
94#define UI_SET_SWBIT _IOW(UINPUT_IOCTL_BASE, 109, int)
94 95
95#define UI_BEGIN_FF_UPLOAD _IOWR(UINPUT_IOCTL_BASE, 200, struct uinput_ff_upload) 96#define UI_BEGIN_FF_UPLOAD _IOWR(UINPUT_IOCTL_BASE, 200, struct uinput_ff_upload)
96#define UI_END_FF_UPLOAD _IOW(UINPUT_IOCTL_BASE, 201, struct uinput_ff_upload) 97#define UI_END_FF_UPLOAD _IOW(UINPUT_IOCTL_BASE, 201, struct uinput_ff_upload)