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authorMichael Buesch <mb@bu3sch.de>2008-12-24 18:39:28 -0500
committerJohn W. Linville <linville@tuxdriver.com>2009-01-29 15:59:38 -0500
commit6b1c7c67603efdf0b39f6056989b0f8194cdc1f3 (patch)
tree7086a0f862ce5f3e5d6e6cb0daca71193c4185f8 /include/linux/ssb
parentbb519bee07eed4fac9921ad658fb1f7ed78defb5 (diff)
b43/ssb: Add SPROM8 extraction and LP-PHY detection
This adds detection code for the LP-PHY and SPROM extraction code for version 8, which is needed by the LP-PHY and newer N-PHY. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'include/linux/ssb')
-rw-r--r--include/linux/ssb/ssb_regs.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index 99a0f991e850..a01b982b5783 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -326,6 +326,42 @@
326#define SSB_SPROM5_GPIOB_P3 0xFF00 /* Pin 3 */ 326#define SSB_SPROM5_GPIOB_P3 0xFF00 /* Pin 3 */
327#define SSB_SPROM5_GPIOB_P3_SHIFT 8 327#define SSB_SPROM5_GPIOB_P3_SHIFT 8
328 328
329/* SPROM Revision 8 */
330#define SSB_SPROM8_BFLLO 0x1084 /* Boardflags (low 16 bits) */
331#define SSB_SPROM8_BFLHI 0x1086 /* Boardflags Hi */
332#define SSB_SPROM8_IL0MAC 0x108C /* 6 byte MAC address */
333#define SSB_SPROM8_CCODE 0x1092 /* 2 byte country code */
334#define SSB_SPROM8_ANTAVAIL 0x109C /* Antenna available bitfields*/
335#define SSB_SPROM8_ANTAVAIL_A 0xFF00 /* A-PHY bitfield */
336#define SSB_SPROM8_ANTAVAIL_A_SHIFT 8
337#define SSB_SPROM8_ANTAVAIL_BG 0x00FF /* B-PHY and G-PHY bitfield */
338#define SSB_SPROM8_ANTAVAIL_BG_SHIFT 0
339#define SSB_SPROM8_AGAIN01 0x109E /* Antenna Gain (in dBm Q5.2) */
340#define SSB_SPROM8_AGAIN0 0x00FF /* Antenna 0 */
341#define SSB_SPROM8_AGAIN0_SHIFT 0
342#define SSB_SPROM8_AGAIN1 0xFF00 /* Antenna 1 */
343#define SSB_SPROM8_AGAIN1_SHIFT 8
344#define SSB_SPROM8_AGAIN23 0x10A0
345#define SSB_SPROM8_AGAIN2 0x00FF /* Antenna 2 */
346#define SSB_SPROM8_AGAIN2_SHIFT 0
347#define SSB_SPROM8_AGAIN3 0xFF00 /* Antenna 3 */
348#define SSB_SPROM8_AGAIN3_SHIFT 8
349#define SSB_SPROM8_GPIOA 0x1096 /*Gen. Purpose IO # 0 and 1 */
350#define SSB_SPROM8_GPIOA_P0 0x00FF /* Pin 0 */
351#define SSB_SPROM8_GPIOA_P1 0xFF00 /* Pin 1 */
352#define SSB_SPROM8_GPIOA_P1_SHIFT 8
353#define SSB_SPROM8_GPIOB 0x1098 /* Gen. Purpose IO # 2 and 3 */
354#define SSB_SPROM8_GPIOB_P2 0x00FF /* Pin 2 */
355#define SSB_SPROM8_GPIOB_P3 0xFF00 /* Pin 3 */
356#define SSB_SPROM8_GPIOB_P3_SHIFT 8
357#define SSB_SPROM8_MAXP_BG 0x10C0 /* Max Power BG in path 1 */
358#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
359#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
360#define SSB_SPROM8_ITSSI_BG_SHIFT 8
361#define SSB_SPROM8_MAXP_A 0x10C8 /* Max Power A in path 1 */
362#define SSB_SPROM8_MAXP_A_MASK 0x00FF /* Mask for Max Power A */
363#define SSB_SPROM8_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */
364#define SSB_SPROM8_ITSSI_A_SHIFT 8
329 365
330/* Values for SSB_SPROM1_BINF_CCODE */ 366/* Values for SSB_SPROM1_BINF_CCODE */
331enum { 367enum {