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authorJiri Kosina <jkosina@suse.cz>2014-02-20 08:54:28 -0500
committerJiri Kosina <jkosina@suse.cz>2014-02-20 08:54:28 -0500
commitd4263348f796f29546f90802177865dd4379dd0a (patch)
treeadcbdaebae584eee2f32fab95e826e8e49eef385 /include/linux/spi
parentbe873ac782f5ff5ee6675f83929f4fe6737eead2 (diff)
parent6d0abeca3242a88cab8232e4acd7e2bf088f3bc2 (diff)
Merge branch 'master' into for-next
Diffstat (limited to 'include/linux/spi')
-rw-r--r--include/linux/spi/74x164.h9
-rw-r--r--include/linux/spi/s3c24xx.h2
-rw-r--r--include/linux/spi/spi.h25
3 files changed, 17 insertions, 19 deletions
diff --git a/include/linux/spi/74x164.h b/include/linux/spi/74x164.h
deleted file mode 100644
index 0aa6acc73317..000000000000
--- a/include/linux/spi/74x164.h
+++ /dev/null
@@ -1,9 +0,0 @@
1#ifndef LINUX_SPI_74X164_H
2#define LINUX_SPI_74X164_H
3
4struct gen_74x164_chip_platform_data {
5 /* number assigned to the first GPIO */
6 unsigned base;
7};
8
9#endif
diff --git a/include/linux/spi/s3c24xx.h b/include/linux/spi/s3c24xx.h
index c23b923e493b..ca271c06c591 100644
--- a/include/linux/spi/s3c24xx.h
+++ b/include/linux/spi/s3c24xx.h
@@ -23,4 +23,6 @@ struct s3c2410_spi_info {
23 void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); 23 void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
24}; 24};
25 25
26extern int s3c24xx_set_fiq(unsigned int irq, bool on);
27
26#endif /* __LINUX_SPI_S3C24XX_H */ 28#endif /* __LINUX_SPI_S3C24XX_H */
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 8d3a37bc6110..2c9cdef0598f 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -75,6 +75,7 @@ struct spi_device {
75 struct spi_master *master; 75 struct spi_master *master;
76 u32 max_speed_hz; 76 u32 max_speed_hz;
77 u8 chip_select; 77 u8 chip_select;
78 u8 bits_per_word;
78 u16 mode; 79 u16 mode;
79#define SPI_CPHA 0x01 /* clock phase */ 80#define SPI_CPHA 0x01 /* clock phase */
80#define SPI_CPOL 0x02 /* clock polarity */ 81#define SPI_CPOL 0x02 /* clock polarity */
@@ -92,7 +93,6 @@ struct spi_device {
92#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ 93#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */
93#define SPI_RX_DUAL 0x400 /* receive with 2 wires */ 94#define SPI_RX_DUAL 0x400 /* receive with 2 wires */
94#define SPI_RX_QUAD 0x800 /* receive with 4 wires */ 95#define SPI_RX_QUAD 0x800 /* receive with 4 wires */
95 u8 bits_per_word;
96 int irq; 96 int irq;
97 void *controller_state; 97 void *controller_state;
98 void *controller_data; 98 void *controller_data;
@@ -273,19 +273,24 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
273 * message while queuing transfers that arrive in the meantime. When the 273 * message while queuing transfers that arrive in the meantime. When the
274 * driver is finished with this message, it must call 274 * driver is finished with this message, it must call
275 * spi_finalize_current_message() so the subsystem can issue the next 275 * spi_finalize_current_message() so the subsystem can issue the next
276 * transfer 276 * message
277 * @unprepare_transfer_hardware: there are currently no more messages on the 277 * @unprepare_transfer_hardware: there are currently no more messages on the
278 * queue so the subsystem notifies the driver that it may relax the 278 * queue so the subsystem notifies the driver that it may relax the
279 * hardware by issuing this call 279 * hardware by issuing this call
280 * @set_cs: assert or deassert chip select, true to assert. May be called 280 * @set_cs: set the logic level of the chip select line. May be called
281 * from interrupt context. 281 * from interrupt context.
282 * @prepare_message: set up the controller to transfer a single message, 282 * @prepare_message: set up the controller to transfer a single message,
283 * for example doing DMA mapping. Called from threaded 283 * for example doing DMA mapping. Called from threaded
284 * context. 284 * context.
285 * @transfer_one: transfer a single spi_transfer. When the 285 * @transfer_one: transfer a single spi_transfer.
286 * driver is finished with this transfer it must call 286 * - return 0 if the transfer is finished,
287 * spi_finalize_current_transfer() so the subsystem can issue 287 * - return 1 if the transfer is still in progress. When
288 * the next transfer 288 * the driver is finished with this transfer it must
289 * call spi_finalize_current_transfer() so the subsystem
290 * can issue the next transfer. Note: transfer_one and
291 * transfer_one_message are mutually exclusive; when both
292 * are set, the generic subsystem does not call your
293 * transfer_one callback.
289 * @unprepare_message: undo any work done by prepare_message(). 294 * @unprepare_message: undo any work done by prepare_message().
290 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS 295 * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
291 * number. Any individual value may be -ENOENT for CS lines that 296 * number. Any individual value may be -ENOENT for CS lines that
@@ -576,8 +581,8 @@ struct spi_transfer {
576 dma_addr_t rx_dma; 581 dma_addr_t rx_dma;
577 582
578 unsigned cs_change:1; 583 unsigned cs_change:1;
579 u8 tx_nbits; 584 unsigned tx_nbits:3;
580 u8 rx_nbits; 585 unsigned rx_nbits:3;
581#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ 586#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
582#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ 587#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
583#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ 588#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
@@ -847,7 +852,7 @@ static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
847 ssize_t status; 852 ssize_t status;
848 u16 result; 853 u16 result;
849 854
850 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2); 855 status = spi_write_then_read(spi, &cmd, 1, &result, 2);
851 856
852 /* return negative errno or unsigned value */ 857 /* return negative errno or unsigned value */
853 return (status < 0) ? status : result; 858 return (status < 0) ? status : result;