spi/dw_spi: clean the cs_control code

commit 052dc7c45i "spi/dw_spi: conditional transfer mode change"
introduced cs_control code, which has a bug by using bit offset
for spi mode to set transfer mode in control register. Also it
forces devices who don't need cs_control to re-configure the
control registers for each spi transfer. This patch will fix them

Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

1 files changed, 2 insertions, 0 deletions

diff --git a/include/linux/spi/dw_spi.h b/include/linux/spi/dw_spi.h
index cc813f95a2f2..c91302f3a257 100644
--- a/include/linux/spi/dw_spi.h
+++ b/include/linux/spi/dw_spi.h
@@ -14,7 +14,9 @@
 #define SPI_MODE_OFFSET                 6
 #define SPI_SCPH_OFFSET                 6
 #define SPI_SCOL_OFFSET                 7
+
 #define SPI_TMOD_OFFSET                 8
+#define SPI_TMOD_MASK                   (0x3 << SPI_TMOD_OFFSET)
 #define SPI_TMOD_TR                     0x0             /* xmit & recv */
 #define SPI_TMOD_TO                     0x1             /* xmit only */
 #define SPI_TMOD_RO                     0x2             /* recv only */