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authorFeng Tang <feng.tang@intel.com>2010-01-20 15:49:45 -0500
committerGrant Likely <grant.likely@secretlab.ca>2010-01-20 15:49:45 -0500
commit552e450929a7298cc8834fd2824a60b2e914f70e (patch)
tree1b9568370d1b40f23dd4d73765e98ff74665eb07 /include/linux/spi
parent51f921c1eb1124fb99ab0728c19e8e14c82c81be (diff)
spi/dw_spi: refine the IRQ mode working flow
Now dw_spi core fully supports 3 transfer modes: pure polling, DMA and IRQ mode. IRQ mode will use the FIFO half empty as the IRQ trigger, so each interface driver need set the fifo_len, so that core driver can handle it properly Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'include/linux/spi')
-rw-r--r--include/linux/spi/dw_spi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/spi/dw_spi.h b/include/linux/spi/dw_spi.h
index 51b3e771a9a3..1a127a31e017 100644
--- a/include/linux/spi/dw_spi.h
+++ b/include/linux/spi/dw_spi.h
@@ -90,6 +90,7 @@ struct dw_spi {
90 unsigned long paddr; 90 unsigned long paddr;
91 u32 iolen; 91 u32 iolen;
92 int irq; 92 int irq;
93 u32 fifo_len; /* depth of the FIFO buffer */
93 u32 max_freq; /* max bus freq supported */ 94 u32 max_freq; /* max bus freq supported */
94 95
95 u16 bus_num; 96 u16 bus_num;