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authorVitaly Wool <vwool@ru.mvista.com>2006-01-08 16:34:28 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2006-01-13 19:29:56 -0500
commit8275c642ccdce09a2146d0a9eb022e3698ee927e (patch)
treeea330810f665fcbdf36d31b0da1643db528ad83f /include/linux/spi/spi.h
parent2f9f762879015d738a5ec2ac8a16be94b3a4a06d (diff)
[PATCH] spi: use linked lists rather than an array
This makes the SPI core and its users access transfers in the SPI message structure as linked list not as an array, as discussed on LKML. From: David Brownell <dbrownell@users.sourceforge.net> Updates including doc, bugfixes to the list code, add spi_message_add_tail(). Plus, initialize things _before_ grabbing the locks in some cases (in case it grows more expensive). This also merges some bitbang updates of mine that didn't yet make it into the mm tree. Signed-off-by: Vitaly Wool <vwool@ru.mvista.com> Signed-off-by: Dmitry Pervushin <dpervushin@gmail.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'include/linux/spi/spi.h')
-rw-r--r--include/linux/spi/spi.h92
1 files changed, 63 insertions, 29 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 6a41e2650b2e..939afd3a2e72 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -263,15 +263,16 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
263 263
264/** 264/**
265 * struct spi_transfer - a read/write buffer pair 265 * struct spi_transfer - a read/write buffer pair
266 * @tx_buf: data to be written (dma-safe address), or NULL 266 * @tx_buf: data to be written (dma-safe memory), or NULL
267 * @rx_buf: data to be read (dma-safe address), or NULL 267 * @rx_buf: data to be read (dma-safe memory), or NULL
268 * @tx_dma: DMA address of buffer, if spi_message.is_dma_mapped 268 * @tx_dma: DMA address of tx_buf, if spi_message.is_dma_mapped
269 * @rx_dma: DMA address of buffer, if spi_message.is_dma_mapped 269 * @rx_dma: DMA address of rx_buf, if spi_message.is_dma_mapped
270 * @len: size of rx and tx buffers (in bytes) 270 * @len: size of rx and tx buffers (in bytes)
271 * @cs_change: affects chipselect after this transfer completes 271 * @cs_change: affects chipselect after this transfer completes
272 * @delay_usecs: microseconds to delay after this transfer before 272 * @delay_usecs: microseconds to delay after this transfer before
273 * (optionally) changing the chipselect status, then starting 273 * (optionally) changing the chipselect status, then starting
274 * the next transfer or completing this spi_message. 274 * the next transfer or completing this spi_message.
275 * @transfer_list: transfers are sequenced through spi_message.transfers
275 * 276 *
276 * SPI transfers always write the same number of bytes as they read. 277 * SPI transfers always write the same number of bytes as they read.
277 * Protocol drivers should always provide rx_buf and/or tx_buf. 278 * Protocol drivers should always provide rx_buf and/or tx_buf.
@@ -279,11 +280,16 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
279 * the data being transferred; that may reduce overhead, when the 280 * the data being transferred; that may reduce overhead, when the
280 * underlying driver uses dma. 281 * underlying driver uses dma.
281 * 282 *
282 * All SPI transfers start with the relevant chipselect active. Drivers 283 * If the transmit buffer is null, undefined data will be shifted out
283 * can change behavior of the chipselect after the transfer finishes 284 * while filling rx_buf. If the receive buffer is null, the data
284 * (including any mandatory delay). The normal behavior is to leave it 285 * shifted in will be discarded. Only "len" bytes shift out (or in).
285 * selected, except for the last transfer in a message. Setting cs_change 286 * It's an error to try to shift out a partial word. (For example, by
286 * allows two additional behavior options: 287 * shifting out three bytes with word size of sixteen or twenty bits;
288 * the former uses two bytes per word, the latter uses four bytes.)
289 *
290 * All SPI transfers start with the relevant chipselect active. Normally
291 * it stays selected until after the last transfer in a message. Drivers
292 * can affect the chipselect signal using cs_change:
287 * 293 *
288 * (i) If the transfer isn't the last one in the message, this flag is 294 * (i) If the transfer isn't the last one in the message, this flag is
289 * used to make the chipselect briefly go inactive in the middle of the 295 * used to make the chipselect briefly go inactive in the middle of the
@@ -299,7 +305,8 @@ extern struct spi_master *spi_busnum_to_master(u16 busnum);
299 * The code that submits an spi_message (and its spi_transfers) 305 * The code that submits an spi_message (and its spi_transfers)
300 * to the lower layers is responsible for managing its memory. 306 * to the lower layers is responsible for managing its memory.
301 * Zero-initialize every field you don't set up explicitly, to 307 * Zero-initialize every field you don't set up explicitly, to
302 * insulate against future API updates. 308 * insulate against future API updates. After you submit a message
309 * and its transfers, ignore them until its completion callback.
303 */ 310 */
304struct spi_transfer { 311struct spi_transfer {
305 /* it's ok if tx_buf == rx_buf (right?) 312 /* it's ok if tx_buf == rx_buf (right?)
@@ -316,12 +323,13 @@ struct spi_transfer {
316 323
317 unsigned cs_change:1; 324 unsigned cs_change:1;
318 u16 delay_usecs; 325 u16 delay_usecs;
326
327 struct list_head transfer_list;
319}; 328};
320 329
321/** 330/**
322 * struct spi_message - one multi-segment SPI transaction 331 * struct spi_message - one multi-segment SPI transaction
323 * @transfers: the segements of the transaction 332 * @transfers: list of transfer segments in this transaction
324 * @n_transfer: how many segments
325 * @spi: SPI device to which the transaction is queued 333 * @spi: SPI device to which the transaction is queued
326 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual 334 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
327 * addresses for each transfer buffer 335 * addresses for each transfer buffer
@@ -333,14 +341,22 @@ struct spi_transfer {
333 * @queue: for use by whichever driver currently owns the message 341 * @queue: for use by whichever driver currently owns the message
334 * @state: for use by whichever driver currently owns the message 342 * @state: for use by whichever driver currently owns the message
335 * 343 *
344 * An spi_message is used to execute an atomic sequence of data transfers,
345 * each represented by a struct spi_transfer. The sequence is "atomic"
346 * in the sense that no other spi_message may use that SPI bus until that
347 * sequence completes. On some systems, many such sequences can execute as
348 * as single programmed DMA transfer. On all systems, these messages are
349 * queued, and might complete after transactions to other devices. Messages
350 * sent to a given spi_device are alway executed in FIFO order.
351 *
336 * The code that submits an spi_message (and its spi_transfers) 352 * The code that submits an spi_message (and its spi_transfers)
337 * to the lower layers is responsible for managing its memory. 353 * to the lower layers is responsible for managing its memory.
338 * Zero-initialize every field you don't set up explicitly, to 354 * Zero-initialize every field you don't set up explicitly, to
339 * insulate against future API updates. 355 * insulate against future API updates. After you submit a message
356 * and its transfers, ignore them until its completion callback.
340 */ 357 */
341struct spi_message { 358struct spi_message {
342 struct spi_transfer *transfers; 359 struct list_head transfers;
343 unsigned n_transfer;
344 360
345 struct spi_device *spi; 361 struct spi_device *spi;
346 362
@@ -371,6 +387,24 @@ struct spi_message {
371 void *state; 387 void *state;
372}; 388};
373 389
390static inline void spi_message_init(struct spi_message *m)
391{
392 memset(m, 0, sizeof *m);
393 INIT_LIST_HEAD(&m->transfers);
394}
395
396static inline void
397spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
398{
399 list_add_tail(&t->transfer_list, &m->transfers);
400}
401
402static inline void
403spi_transfer_del(struct spi_transfer *t)
404{
405 list_del(&t->transfer_list);
406}
407
374/* It's fine to embed message and transaction structures in other data 408/* It's fine to embed message and transaction structures in other data
375 * structures so long as you don't free them while they're in use. 409 * structures so long as you don't free them while they're in use.
376 */ 410 */
@@ -383,8 +417,12 @@ static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags
383 + ntrans * sizeof(struct spi_transfer), 417 + ntrans * sizeof(struct spi_transfer),
384 flags); 418 flags);
385 if (m) { 419 if (m) {
386 m->transfers = (void *)(m + 1); 420 int i;
387 m->n_transfer = ntrans; 421 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
422
423 INIT_LIST_HEAD(&m->transfers);
424 for (i = 0; i < ntrans; i++, t++)
425 spi_message_add_tail(t, m);
388 } 426 }
389 return m; 427 return m;
390} 428}
@@ -402,6 +440,8 @@ static inline void spi_message_free(struct spi_message *m)
402 * device doesn't work with the mode 0 default. They may likewise need 440 * device doesn't work with the mode 0 default. They may likewise need
403 * to update clock rates or word sizes from initial values. This function 441 * to update clock rates or word sizes from initial values. This function
404 * changes those settings, and must be called from a context that can sleep. 442 * changes those settings, and must be called from a context that can sleep.
443 * The changes take effect the next time the device is selected and data
444 * is transferred to or from it.
405 */ 445 */
406static inline int 446static inline int
407spi_setup(struct spi_device *spi) 447spi_setup(struct spi_device *spi)
@@ -468,15 +508,12 @@ spi_write(struct spi_device *spi, const u8 *buf, size_t len)
468{ 508{
469 struct spi_transfer t = { 509 struct spi_transfer t = {
470 .tx_buf = buf, 510 .tx_buf = buf,
471 .rx_buf = NULL,
472 .len = len, 511 .len = len,
473 .cs_change = 0,
474 };
475 struct spi_message m = {
476 .transfers = &t,
477 .n_transfer = 1,
478 }; 512 };
513 struct spi_message m;
479 514
515 spi_message_init(&m);
516 spi_message_add_tail(&t, &m);
480 return spi_sync(spi, &m); 517 return spi_sync(spi, &m);
481} 518}
482 519
@@ -493,16 +530,13 @@ static inline int
493spi_read(struct spi_device *spi, u8 *buf, size_t len) 530spi_read(struct spi_device *spi, u8 *buf, size_t len)
494{ 531{
495 struct spi_transfer t = { 532 struct spi_transfer t = {
496 .tx_buf = NULL,
497 .rx_buf = buf, 533 .rx_buf = buf,
498 .len = len, 534 .len = len,
499 .cs_change = 0,
500 };
501 struct spi_message m = {
502 .transfers = &t,
503 .n_transfer = 1,
504 }; 535 };
536 struct spi_message m;
505 537
538 spi_message_init(&m);
539 spi_message_add_tail(&t, &m);
506 return spi_sync(spi, &m); 540 return spi_sync(spi, &m);
507} 541}
508 542