diff options
author | Mark Brown <broonie@linaro.org> | 2014-01-23 08:07:01 -0500 |
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committer | Mark Brown <broonie@linaro.org> | 2014-01-23 08:07:01 -0500 |
commit | 3c1039745ef2925aceed53d38af0cddac8e36f31 (patch) | |
tree | 163fe6bf0ab203d69712936b3bda5d3e98acdeee /include/linux/spi/spi.h | |
parent | 7e2c225d585cd6d7481ff4ec446a67334ef11f4d (diff) | |
parent | 1afd9989a6a2561183be82e420d4d2f3889b7ee7 (diff) |
Merge remote-tracking branch 'spi/topic/core' into spi-linus
Diffstat (limited to 'include/linux/spi/spi.h')
-rw-r--r-- | include/linux/spi/spi.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 9f5242df9311..a1d4ca290862 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h | |||
@@ -75,6 +75,7 @@ struct spi_device { | |||
75 | struct spi_master *master; | 75 | struct spi_master *master; |
76 | u32 max_speed_hz; | 76 | u32 max_speed_hz; |
77 | u8 chip_select; | 77 | u8 chip_select; |
78 | u8 bits_per_word; | ||
78 | u16 mode; | 79 | u16 mode; |
79 | #define SPI_CPHA 0x01 /* clock phase */ | 80 | #define SPI_CPHA 0x01 /* clock phase */ |
80 | #define SPI_CPOL 0x02 /* clock polarity */ | 81 | #define SPI_CPOL 0x02 /* clock polarity */ |
@@ -92,7 +93,6 @@ struct spi_device { | |||
92 | #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ | 93 | #define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ |
93 | #define SPI_RX_DUAL 0x400 /* receive with 2 wires */ | 94 | #define SPI_RX_DUAL 0x400 /* receive with 2 wires */ |
94 | #define SPI_RX_QUAD 0x800 /* receive with 4 wires */ | 95 | #define SPI_RX_QUAD 0x800 /* receive with 4 wires */ |
95 | u8 bits_per_word; | ||
96 | int irq; | 96 | int irq; |
97 | void *controller_state; | 97 | void *controller_state; |
98 | void *controller_data; | 98 | void *controller_data; |
@@ -578,8 +578,8 @@ struct spi_transfer { | |||
578 | dma_addr_t rx_dma; | 578 | dma_addr_t rx_dma; |
579 | 579 | ||
580 | unsigned cs_change:1; | 580 | unsigned cs_change:1; |
581 | u8 tx_nbits; | 581 | unsigned tx_nbits:3; |
582 | u8 rx_nbits; | 582 | unsigned rx_nbits:3; |
583 | #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ | 583 | #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ |
584 | #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ | 584 | #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ |
585 | #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ | 585 | #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ |
@@ -849,7 +849,7 @@ static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) | |||
849 | ssize_t status; | 849 | ssize_t status; |
850 | u16 result; | 850 | u16 result; |
851 | 851 | ||
852 | status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2); | 852 | status = spi_write_then_read(spi, &cmd, 1, &result, 2); |
853 | 853 | ||
854 | /* return negative errno or unsigned value */ | 854 | /* return negative errno or unsigned value */ |
855 | return (status < 0) ? status : result; | 855 | return (status < 0) ? status : result; |