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authorPaul Mundt <lethal@linux-sh.org>2011-06-13 23:40:19 -0400
committerPaul Mundt <lethal@linux-sh.org>2011-06-13 23:40:19 -0400
commit61a6976bf19a6cf5dfcf37c3536665b316f22d49 (patch)
tree969831bb2a782454960a82a77d2802f62cc7ed91 /include/linux/serial_sci.h
parente13198894bf6308c097e5678ee315e12b2e1b7a8 (diff)
serial: sh-sci: Abstract register maps.
This takes a bit of a sledgehammer to the horribly CPU subtype ifdef-ridden header and abstracts all of the different register layouts in to distinct types which in turn can be overriden on a per-port basis, or permitted to default to the map matching the port type at probe time. In the process this ultimately fixes up inumerable bugs with mismatches on various CPU types (particularly the legacy ones that were obviously broken years ago and no one noticed) and provides a more tightly coupled and consolidated platform for extending and implementing generic features. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/linux/serial_sci.h')
-rw-r--r--include/linux/serial_sci.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
index ecefec7c0b67..4ca130a90ea5 100644
--- a/include/linux/serial_sci.h
+++ b/include/linux/serial_sci.h
@@ -58,6 +58,22 @@ enum {
58 SCIx_NR_IRQS, 58 SCIx_NR_IRQS,
59}; 59};
60 60
61enum {
62 SCIx_PROBE_REGTYPE,
63
64 SCIx_SCI_REGTYPE,
65 SCIx_IRDA_REGTYPE,
66 SCIx_SCIFA_REGTYPE,
67 SCIx_SCIFB_REGTYPE,
68 SCIx_SH3_SCIF_REGTYPE,
69 SCIx_SH4_SCIF_REGTYPE,
70 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
71 SCIx_SH4_SCIF_FIFODATA_REGTYPE,
72 SCIx_SH7705_SCIF_REGTYPE,
73
74 SCIx_NR_REGTYPES,
75};
76
61#define SCIx_IRQ_MUXED(irq) \ 77#define SCIx_IRQ_MUXED(irq) \
62{ \ 78{ \
63 [SCIx_ERI_IRQ] = (irq), \ 79 [SCIx_ERI_IRQ] = (irq), \
@@ -66,8 +82,24 @@ enum {
66 [SCIx_BRI_IRQ] = (irq), \ 82 [SCIx_BRI_IRQ] = (irq), \
67} 83}
68 84
85/*
86 * SCI register subset common for all port types.
87 * Not all registers will exist on all parts.
88 */
89enum {
90 SCSMR, SCBRR, SCSCR, SCxSR,
91 SCFCR, SCFDR, SCxTDR, SCxRDR,
92 SCLSR, SCTFDR, SCRFDR, SCSPTR,
93
94 SCIx_NR_REGS,
95};
96
69struct device; 97struct device;
70 98
99struct plat_sci_port_ops {
100 void (*init_pins)(struct uart_port *, unsigned int cflag);
101};
102
71/* 103/*
72 * Platform device specific platform_data struct 104 * Platform device specific platform_data struct
73 */ 105 */
@@ -87,6 +119,10 @@ struct plat_sci_port {
87 unsigned int error_mask; 119 unsigned int error_mask;
88 120
89 int port_reg; 121 int port_reg;
122 unsigned char regshift;
123 unsigned char regtype;
124
125 struct plat_sci_port_ops *ops;
90 126
91 struct device *dma_dev; 127 struct device *dma_dev;
92 128