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authorAlexandre Bounine <alexandre.bounine@idt.com>2010-05-26 17:43:59 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-27 12:12:50 -0400
commite5cabeb3d60f9cd3e3950aff071319ae0e2d08d8 (patch)
treee866f1a9076608630a40f21f0a50c073dedb0e57 /include/linux/rio_regs.h
parent818a04a0bb93643d57dd8935815de2ff307b58a3 (diff)
rapidio: add Port-Write handling for EM
Add RapidIO Port-Write message handling in the context of Error Management Extensions Specification Rev.1.3. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Tested-by: Thomas Moll <thomas.moll@sysgo.com> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Li Yang <leoli@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/linux/rio_regs.h')
-rw-r--r--include/linux/rio_regs.h61
1 files changed, 58 insertions, 3 deletions
diff --git a/include/linux/rio_regs.h b/include/linux/rio_regs.h
index 4bfb0dcfac7c..96ba2159d9fe 100644
--- a/include/linux/rio_regs.h
+++ b/include/linux/rio_regs.h
@@ -192,10 +192,14 @@
192#define RIO_EFB_PAR_EP_ID 0x0001 /* [IV] LP/LVDS EP Devices */ 192#define RIO_EFB_PAR_EP_ID 0x0001 /* [IV] LP/LVDS EP Devices */
193#define RIO_EFB_PAR_EP_REC_ID 0x0002 /* [IV] LP/LVDS EP Recovery Devices */ 193#define RIO_EFB_PAR_EP_REC_ID 0x0002 /* [IV] LP/LVDS EP Recovery Devices */
194#define RIO_EFB_PAR_EP_FREE_ID 0x0003 /* [IV] LP/LVDS EP Free Devices */ 194#define RIO_EFB_PAR_EP_FREE_ID 0x0003 /* [IV] LP/LVDS EP Free Devices */
195#define RIO_EFB_SER_EP_ID_V13P 0x0001 /* [VI] LP/Serial EP Devices, RapidIO Spec ver 1.3 and above */
196#define RIO_EFB_SER_EP_REC_ID_V13P 0x0002 /* [VI] LP/Serial EP Recovery Devices, RapidIO Spec ver 1.3 and above */
197#define RIO_EFB_SER_EP_FREE_ID_V13P 0x0003 /* [VI] LP/Serial EP Free Devices, RapidIO Spec ver 1.3 and above */
195#define RIO_EFB_SER_EP_ID 0x0004 /* [VI] LP/Serial EP Devices */ 198#define RIO_EFB_SER_EP_ID 0x0004 /* [VI] LP/Serial EP Devices */
196#define RIO_EFB_SER_EP_REC_ID 0x0005 /* [VI] LP/Serial EP Recovery Devices */ 199#define RIO_EFB_SER_EP_REC_ID 0x0005 /* [VI] LP/Serial EP Recovery Devices */
197#define RIO_EFB_SER_EP_FREE_ID 0x0006 /* [VI] LP/Serial EP Free Devices */ 200#define RIO_EFB_SER_EP_FREE_ID 0x0006 /* [VI] LP/Serial EP Free Devices */
198#define RIO_EFB_SER_EP_FREC_ID 0x0009 /* [VI] LP/Serial EP Free Recovery Devices */ 201#define RIO_EFB_SER_EP_FREC_ID 0x0009 /* [VI] LP/Serial EP Free Recovery Devices */
202#define RIO_EFB_ERR_MGMNT 0x0007 /* [VIII] Error Management Extensions */
199 203
200/* 204/*
201 * Physical 8/16 LP-LVDS 205 * Physical 8/16 LP-LVDS
@@ -211,15 +215,66 @@
211#define RIO_PORT_MNT_HEADER 0x0000 215#define RIO_PORT_MNT_HEADER 0x0000
212#define RIO_PORT_REQ_CTL_CSR 0x0020 216#define RIO_PORT_REQ_CTL_CSR 0x0020
213#define RIO_PORT_RSP_CTL_CSR 0x0024 /* 0x0001/0x0002 */ 217#define RIO_PORT_RSP_CTL_CSR 0x0024 /* 0x0001/0x0002 */
218#define RIO_PORT_LINKTO_CTL_CSR 0x0020 /* Serial */
219#define RIO_PORT_RSPTO_CTL_CSR 0x0024 /* Serial */
214#define RIO_PORT_GEN_CTL_CSR 0x003c 220#define RIO_PORT_GEN_CTL_CSR 0x003c
215#define RIO_PORT_GEN_HOST 0x80000000 221#define RIO_PORT_GEN_HOST 0x80000000
216#define RIO_PORT_GEN_MASTER 0x40000000 222#define RIO_PORT_GEN_MASTER 0x40000000
217#define RIO_PORT_GEN_DISCOVERED 0x20000000 223#define RIO_PORT_GEN_DISCOVERED 0x20000000
218#define RIO_PORT_N_MNT_REQ_CSR(x) (0x0040 + x*0x20) /* 0x0002 */ 224#define RIO_PORT_N_MNT_REQ_CSR(x) (0x0040 + x*0x20) /* 0x0002 */
219#define RIO_PORT_N_MNT_RSP_CSR(x) (0x0044 + x*0x20) /* 0x0002 */ 225#define RIO_PORT_N_MNT_RSP_CSR(x) (0x0044 + x*0x20) /* 0x0002 */
226#define RIO_PORT_N_MNT_RSP_RVAL 0x80000000 /* Response Valid */
227#define RIO_PORT_N_MNT_RSP_ASTAT 0x000003e0 /* ackID Status */
228#define RIO_PORT_N_MNT_RSP_LSTAT 0x0000001f /* Link Status */
220#define RIO_PORT_N_ACK_STS_CSR(x) (0x0048 + x*0x20) /* 0x0002 */ 229#define RIO_PORT_N_ACK_STS_CSR(x) (0x0048 + x*0x20) /* 0x0002 */
221#define RIO_PORT_N_ERR_STS_CSR(x) (0x58 + x*0x20) 230#define RIO_PORT_N_ACK_CLEAR 0x80000000
222#define PORT_N_ERR_STS_PORT_OK 0x00000002 231#define RIO_PORT_N_ACK_INBOUND 0x1f000000
223#define RIO_PORT_N_CTL_CSR(x) (0x5c + x*0x20) 232#define RIO_PORT_N_ACK_OUTSTAND 0x00001f00
233#define RIO_PORT_N_ACK_OUTBOUND 0x0000001f
234#define RIO_PORT_N_ERR_STS_CSR(x) (0x0058 + x*0x20)
235#define RIO_PORT_N_ERR_STS_PW_OUT_ES 0x00010000 /* Output Error-stopped */
236#define RIO_PORT_N_ERR_STS_PW_INP_ES 0x00000100 /* Input Error-stopped */
237#define RIO_PORT_N_ERR_STS_PW_PEND 0x00000010 /* Port-Write Pending */
238#define RIO_PORT_N_ERR_STS_PORT_ERR 0x00000004
239#define RIO_PORT_N_ERR_STS_PORT_OK 0x00000002
240#define RIO_PORT_N_ERR_STS_PORT_UNINIT 0x00000001
241#define RIO_PORT_N_ERR_STS_CLR_MASK 0x07120204
242#define RIO_PORT_N_CTL_CSR(x) (0x005c + x*0x20)
243#define RIO_PORT_N_CTL_PWIDTH 0xc0000000
244#define RIO_PORT_N_CTL_PWIDTH_1 0x00000000
245#define RIO_PORT_N_CTL_PWIDTH_4 0x40000000
246#define RIO_PORT_N_CTL_LOCKOUT 0x00000002
247
248/*
249 * Error Management Extensions (RapidIO 1.3+, Part 8)
250 *
251 * Extended Features Block ID=0x0007
252 */
253
254/* General EM Registers (Common for all Ports) */
255
256#define RIO_EM_EFB_HEADER 0x000 /* Error Management Extensions Block Header */
257#define RIO_EM_LTL_ERR_DETECT 0x008 /* Logical/Transport Layer Error Detect CSR */
258#define RIO_EM_LTL_ERR_EN 0x00c /* Logical/Transport Layer Error Enable CSR */
259#define RIO_EM_LTL_HIADDR_CAP 0x010 /* Logical/Transport Layer High Address Capture CSR */
260#define RIO_EM_LTL_ADDR_CAP 0x014 /* Logical/Transport Layer Address Capture CSR */
261#define RIO_EM_LTL_DEVID_CAP 0x018 /* Logical/Transport Layer Device ID Capture CSR */
262#define RIO_EM_LTL_CTRL_CAP 0x01c /* Logical/Transport Layer Control Capture CSR */
263#define RIO_EM_PW_TGT_DEVID 0x028 /* Port-write Target deviceID CSR */
264#define RIO_EM_PKT_TTL 0x02c /* Packet Time-to-live CSR */
265
266/* Per-Port EM Registers */
267
268#define RIO_EM_PN_ERR_DETECT(x) (0x040 + x*0x40) /* Port N Error Detect CSR */
269#define REM_PED_IMPL_SPEC 0x80000000
270#define REM_PED_LINK_TO 0x00000001
271#define RIO_EM_PN_ERRRATE_EN(x) (0x044 + x*0x40) /* Port N Error Rate Enable CSR */
272#define RIO_EM_PN_ATTRIB_CAP(x) (0x048 + x*0x40) /* Port N Attributes Capture CSR */
273#define RIO_EM_PN_PKT_CAP_0(x) (0x04c + x*0x40) /* Port N Packet/Control Symbol Capture 0 CSR */
274#define RIO_EM_PN_PKT_CAP_1(x) (0x050 + x*0x40) /* Port N Packet Capture 1 CSR */
275#define RIO_EM_PN_PKT_CAP_2(x) (0x054 + x*0x40) /* Port N Packet Capture 2 CSR */
276#define RIO_EM_PN_PKT_CAP_3(x) (0x058 + x*0x40) /* Port N Packet Capture 3 CSR */
277#define RIO_EM_PN_ERRRATE(x) (0x068 + x*0x40) /* Port N Error Rate CSR */
278#define RIO_EM_PN_ERRRATE_TR(x) (0x06c + x*0x40) /* Port N Error Rate Threshold CSR */
224 279
225#endif /* LINUX_RIO_REGS_H */ 280#endif /* LINUX_RIO_REGS_H */