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authorPeter Zijlstra <a.p.zijlstra@chello.nl>2009-06-11 07:19:29 -0400
committerIngo Molnar <mingo@elte.hu>2009-06-11 11:53:41 -0400
commit1c432d899d32d36371ee4ee310fa3609cf0e5742 (patch)
treecd2891fb0c8a03a5b8ac1100b23687d02a981b25 /include/linux/perf_counter.h
parent729ff5e2aaf181f5d3ab849337fce406cd19b1d9 (diff)
perf_counter: Rename enums
Rename the perf enums to be in the 'perf_' namespace and strictly enumerate the ABI bits. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/linux/perf_counter.h')
-rw-r--r--include/linux/perf_counter.h53
1 files changed, 25 insertions, 28 deletions
diff --git a/include/linux/perf_counter.h b/include/linux/perf_counter.h
index 95c797c480e8..d5911b02bc8c 100644
--- a/include/linux/perf_counter.h
+++ b/include/linux/perf_counter.h
@@ -24,24 +24,21 @@
24/* 24/*
25 * attr.type 25 * attr.type
26 */ 26 */
27enum perf_event_types { 27enum perf_type_id {
28 PERF_TYPE_HARDWARE = 0, 28 PERF_TYPE_HARDWARE = 0,
29 PERF_TYPE_SOFTWARE = 1, 29 PERF_TYPE_SOFTWARE = 1,
30 PERF_TYPE_TRACEPOINT = 2, 30 PERF_TYPE_TRACEPOINT = 2,
31 PERF_TYPE_HW_CACHE = 3, 31 PERF_TYPE_HW_CACHE = 3,
32 PERF_TYPE_RAW = 4,
32 33
33 /* 34 PERF_TYPE_MAX, /* non ABI */
34 * available TYPE space, raw is the max value.
35 */
36
37 PERF_TYPE_RAW = 128,
38}; 35};
39 36
40/* 37/*
41 * Generalized performance counter event types, used by the attr.event_id 38 * Generalized performance counter event types, used by the attr.event_id
42 * parameter of the sys_perf_counter_open() syscall: 39 * parameter of the sys_perf_counter_open() syscall:
43 */ 40 */
44enum attr_ids { 41enum perf_hw_id {
45 /* 42 /*
46 * Common hardware events, generalized by the kernel: 43 * Common hardware events, generalized by the kernel:
47 */ 44 */
@@ -53,7 +50,7 @@ enum attr_ids {
53 PERF_COUNT_BRANCH_MISSES = 5, 50 PERF_COUNT_BRANCH_MISSES = 5,
54 PERF_COUNT_BUS_CYCLES = 6, 51 PERF_COUNT_BUS_CYCLES = 6,
55 52
56 PERF_HW_EVENTS_MAX = 7, 53 PERF_HW_EVENTS_MAX, /* non ABI */
57}; 54};
58 55
59/* 56/*
@@ -63,30 +60,30 @@ enum attr_ids {
63 * { read, write, prefetch } x 60 * { read, write, prefetch } x
64 * { accesses, misses } 61 * { accesses, misses }
65 */ 62 */
66enum hw_cache_id { 63enum perf_hw_cache_id {
67 PERF_COUNT_HW_CACHE_L1D, 64 PERF_COUNT_HW_CACHE_L1D = 0,
68 PERF_COUNT_HW_CACHE_L1I, 65 PERF_COUNT_HW_CACHE_L1I = 1,
69 PERF_COUNT_HW_CACHE_L2, 66 PERF_COUNT_HW_CACHE_L2 = 2,
70 PERF_COUNT_HW_CACHE_DTLB, 67 PERF_COUNT_HW_CACHE_DTLB = 3,
71 PERF_COUNT_HW_CACHE_ITLB, 68 PERF_COUNT_HW_CACHE_ITLB = 4,
72 PERF_COUNT_HW_CACHE_BPU, 69 PERF_COUNT_HW_CACHE_BPU = 5,
73 70
74 PERF_COUNT_HW_CACHE_MAX, 71 PERF_COUNT_HW_CACHE_MAX, /* non ABI */
75}; 72};
76 73
77enum hw_cache_op_id { 74enum perf_hw_cache_op_id {
78 PERF_COUNT_HW_CACHE_OP_READ, 75 PERF_COUNT_HW_CACHE_OP_READ = 0,
79 PERF_COUNT_HW_CACHE_OP_WRITE, 76 PERF_COUNT_HW_CACHE_OP_WRITE = 1,
80 PERF_COUNT_HW_CACHE_OP_PREFETCH, 77 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
81 78
82 PERF_COUNT_HW_CACHE_OP_MAX, 79 PERF_COUNT_HW_CACHE_OP_MAX, /* non ABI */
83}; 80};
84 81
85enum hw_cache_op_result_id { 82enum perf_hw_cache_op_result_id {
86 PERF_COUNT_HW_CACHE_RESULT_ACCESS, 83 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
87 PERF_COUNT_HW_CACHE_RESULT_MISS, 84 PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
88 85
89 PERF_COUNT_HW_CACHE_RESULT_MAX, 86 PERF_COUNT_HW_CACHE_RESULT_MAX, /* non ABI */
90}; 87};
91 88
92/* 89/*
@@ -95,7 +92,7 @@ enum hw_cache_op_result_id {
95 * physical and sw events of the kernel (and allow the profiling of them as 92 * physical and sw events of the kernel (and allow the profiling of them as
96 * well): 93 * well):
97 */ 94 */
98enum sw_event_ids { 95enum perf_sw_ids {
99 PERF_COUNT_CPU_CLOCK = 0, 96 PERF_COUNT_CPU_CLOCK = 0,
100 PERF_COUNT_TASK_CLOCK = 1, 97 PERF_COUNT_TASK_CLOCK = 1,
101 PERF_COUNT_PAGE_FAULTS = 2, 98 PERF_COUNT_PAGE_FAULTS = 2,
@@ -104,7 +101,7 @@ enum sw_event_ids {
104 PERF_COUNT_PAGE_FAULTS_MIN = 5, 101 PERF_COUNT_PAGE_FAULTS_MIN = 5,
105 PERF_COUNT_PAGE_FAULTS_MAJ = 6, 102 PERF_COUNT_PAGE_FAULTS_MAJ = 6,
106 103
107 PERF_SW_EVENTS_MAX = 7, 104 PERF_SW_EVENTS_MAX, /* non ABI */
108}; 105};
109 106
110/* 107/*