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authorVernon Mauery <vernux@us.ibm.com>2010-05-18 18:02:50 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-05-18 19:23:56 -0400
commitbd9e19ca46b54fa85141c4d20afd668379d94c81 (patch)
tree50b5927ff444a68c74895037b7267fadacdecbbe /include/linux/pci_ids.h
parentd4d1ef4515cca074d5bbe1c63420822d6b20fe63 (diff)
Add support for Westmere to i7core_edac driver
This adds new PCI IDs for the Westmere's memory controller devices and modifies the i7core_edac driver to be able to probe both Nehalem and Westmere processors. Signed-off-by: Vernon Mauery <vernux@us.ibm.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'include/linux/pci_ids.h')
-rw-r--r--include/linux/pci_ids.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 46d76e985bac..413fab765a5f 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2567,6 +2567,22 @@
2567#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR 0x2ca9 2567#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR 0x2ca9
2568#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK 0x2caa 2568#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK 0x2caa
2569#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC 0x2cab 2569#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC 0x2cab
2570#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR_REV2 0x2d98
2571#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD_REV2 0x2d99
2572#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_RAS_REV2 0x2d9a
2573#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST_REV2 0x2d9c
2574#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL_REV2 0x2da0
2575#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR_REV2 0x2da1
2576#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK_REV2 0x2da2
2577#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC_REV2 0x2da3
2578#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL_REV2 0x2da8
2579#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR_REV2 0x2da9
2580#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK_REV2 0x2daa
2581#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC_REV2 0x2dab
2582#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_CTRL_REV2 0x2db0
2583#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2 0x2db1
2584#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2 0x2db2
2585#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2 0x2db3
2570#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 2586#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
2571#define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429 2587#define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429
2572#define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a 2588#define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a