diff options
author | Alan Cox <alan@linux.intel.com> | 2012-11-28 17:33:00 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-01-16 00:44:39 -0500 |
commit | 55c7c0fdc5aae43ca7eda3adb22ab782634fcb24 (patch) | |
tree | 27f27d69cb5929896c06a4bcd55a26c00aaa0c9f /include/linux/pci_ids.h | |
parent | 9931faca02c604c22335f5a935a501bb2ace6e20 (diff) |
serial: quatech: add the other serial identifiers and preliminary control code
Jonathan Woithe posted an out of tree enabler/control module for these
cards. Lift the relevant identifiers and put them in the 8250_pci driver
along with code used to control custom registers on these cards.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Jonathan Woithe <jwoithe@just42.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'include/linux/pci_ids.h')
-rw-r--r-- | include/linux/pci_ids.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 0eb65796bcb9..19e8d7a42b34 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -1868,8 +1868,23 @@ | |||
1868 | #define PCI_VENDOR_ID_QUATECH 0x135C | 1868 | #define PCI_VENDOR_ID_QUATECH 0x135C |
1869 | #define PCI_DEVICE_ID_QUATECH_QSC100 0x0010 | 1869 | #define PCI_DEVICE_ID_QUATECH_QSC100 0x0010 |
1870 | #define PCI_DEVICE_ID_QUATECH_DSC100 0x0020 | 1870 | #define PCI_DEVICE_ID_QUATECH_DSC100 0x0020 |
1871 | #define PCI_DEVICE_ID_QUATECH_DSC200 0x0030 | ||
1872 | #define PCI_DEVICE_ID_QUATECH_QSC200 0x0040 | ||
1871 | #define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050 | 1873 | #define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050 |
1872 | #define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060 | 1874 | #define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060 |
1875 | #define PCI_DEVICE_ID_QUATECH_QSCP100 0x0120 | ||
1876 | #define PCI_DEVICE_ID_QUATECH_DSCP100 0x0130 | ||
1877 | #define PCI_DEVICE_ID_QUATECH_QSCP200 0x0140 | ||
1878 | #define PCI_DEVICE_ID_QUATECH_DSCP200 0x0150 | ||
1879 | #define PCI_DEVICE_ID_QUATECH_QSCLP100 0x0170 | ||
1880 | #define PCI_DEVICE_ID_QUATECH_DSCLP100 0x0180 | ||
1881 | #define PCI_DEVICE_ID_QUATECH_DSC100E 0x0181 | ||
1882 | #define PCI_DEVICE_ID_QUATECH_SSCLP100 0x0190 | ||
1883 | #define PCI_DEVICE_ID_QUATECH_QSCLP200 0x01A0 | ||
1884 | #define PCI_DEVICE_ID_QUATECH_DSCLP200 0x01B0 | ||
1885 | #define PCI_DEVICE_ID_QUATECH_DSC200E 0x01B1 | ||
1886 | #define PCI_DEVICE_ID_QUATECH_SSCLP200 0x01C0 | ||
1887 | #define PCI_DEVICE_ID_QUATECH_ESCLP100 0x01E0 | ||
1873 | #define PCI_DEVICE_ID_QUATECH_SPPXP_100 0x0278 | 1888 | #define PCI_DEVICE_ID_QUATECH_SPPXP_100 0x0278 |
1874 | 1889 | ||
1875 | #define PCI_VENDOR_ID_SEALEVEL 0x135e | 1890 | #define PCI_VENDOR_ID_SEALEVEL 0x135e |