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authorPierre Ossman <drzeus@drzeus.cx>2007-12-02 13:58:16 -0500
committerPierre Ossman <drzeus@drzeus.cx>2007-12-12 14:01:00 -0500
commit84c46a53fc4ea4ff36df783a20187b2f65dd21cc (patch)
treecfd19b5b6afb71526512fe2241140d0057dd701e /include/linux/pci_ids.h
parentc9fddbc4f844f5a16b5957c61fe2cfcb5c12f990 (diff)
sdhci: support JMicron JMB38x chips
The JMicron JMB38x chip doesn't support transfers that aren't 32-bit aligned (both size and start address). It also doesn't like switching between PIO and DMA mode, so it needs to be reset after each request. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'include/linux/pci_ids.h')
-rw-r--r--include/linux/pci_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 111aa10f1136..023656d2f1da 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2148,6 +2148,7 @@
2148#define PCI_DEVICE_ID_JMICRON_JMB365 0x2365 2148#define PCI_DEVICE_ID_JMICRON_JMB365 0x2365
2149#define PCI_DEVICE_ID_JMICRON_JMB366 0x2366 2149#define PCI_DEVICE_ID_JMICRON_JMB366 0x2366
2150#define PCI_DEVICE_ID_JMICRON_JMB368 0x2368 2150#define PCI_DEVICE_ID_JMICRON_JMB368 0x2368
2151#define PCI_DEVICE_ID_JMICRON_JMB38X_SD 0x2381
2151 2152
2152#define PCI_VENDOR_ID_KORENIX 0x1982 2153#define PCI_VENDOR_ID_KORENIX 0x1982
2153#define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600 2154#define PCI_DEVICE_ID_KORENIX_JETCARDF0 0x1600