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authorBrian King <brking@us.ibm.com>2005-09-27 04:21:55 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2005-10-28 18:36:58 -0400
commite04b0ea2e0f9c1bb0d874db4493fc7f7a623116b (patch)
tree75937e50de883f69e906a4c8bc9f119d86c14411 /include/linux/pci.h
parent2cea752f683af1be58ee8f25717c0a8118e0ac5b (diff)
[PATCH] PCI: Block config access during BIST
Some PCI adapters (eg. ipr scsi adapters) have an exposure today in that they issue BIST to the adapter to reset the card. If, during the time it takes to complete BIST, userspace attempts to access PCI config space, the host bus bridge will master abort the access since the ipr adapter does not respond on the PCI bus for a brief period of time when running BIST. On PPC64 hardware, this master abort results in the host PCI bridge isolating that PCI device from the rest of the system, making the device unusable until Linux is rebooted. This patch is an attempt to close that exposure by introducing some blocking code in the PCI code. When blocked, writes will be humored and reads will return the cached value. Ben Herrenschmidt has also mentioned that he plans to use this in PPC power management. Signed-off-by: Brian King <brking@us.ibm.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/pci/access.c | 89 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci-sysfs.c | 20 +++++----- drivers/pci/pci.h | 7 +++ drivers/pci/proc.c | 28 +++++++-------- drivers/pci/syscall.c | 14 +++---- include/linux/pci.h | 7 +++ 6 files changed, 134 insertions(+), 31 deletions(-)
Diffstat (limited to 'include/linux/pci.h')
-rw-r--r--include/linux/pci.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 7349058ed778..3596ac94ecff 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -132,6 +132,7 @@ struct pci_dev {
132 unsigned int is_enabled:1; /* pci_enable_device has been called */ 132 unsigned int is_enabled:1; /* pci_enable_device has been called */
133 unsigned int is_busmaster:1; /* device is busmaster */ 133 unsigned int is_busmaster:1; /* device is busmaster */
134 unsigned int no_msi:1; /* device may not use msi */ 134 unsigned int no_msi:1; /* device may not use msi */
135 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
135 136
136 u32 saved_config_space[16]; /* config space saved at suspend time */ 137 u32 saved_config_space[16]; /* config space saved at suspend time */
137 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ 138 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
@@ -490,6 +491,9 @@ extern void pci_disable_msix(struct pci_dev *dev);
490extern void msi_remove_pci_irq_vectors(struct pci_dev *dev); 491extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
491#endif 492#endif
492 493
494extern void pci_block_user_cfg_access(struct pci_dev *dev);
495extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
496
493/* 497/*
494 * PCI domain support. Sometimes called PCI segment (eg by ACPI), 498 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
495 * a PCI domain is defined to be a set of PCI busses which share 499 * a PCI domain is defined to be a set of PCI busses which share
@@ -560,6 +564,9 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int en
560 564
561#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) 565#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
562 566
567static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
568static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
569
563#endif /* CONFIG_PCI */ 570#endif /* CONFIG_PCI */
564 571
565/* Include architecture-dependent settings and functions */ 572/* Include architecture-dependent settings and functions */