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authorBjorn Helgaas <bhelgaas@google.com>2013-11-14 13:28:18 -0500
committerBjorn Helgaas <bhelgaas@google.com>2013-11-14 13:28:18 -0500
commitf7625980f5820edd1a73536e1a03bcbc1f889fec (patch)
tree145e76f39b3e1d08d3e7a48a0993c0cd59088cc6 /include/linux/pci.h
parent4fbf888accb39af423f271111d44e8186f053723 (diff)
PCI: Fix whitespace, capitalization, and spelling errors
Fix whitespace, capitalization, and spelling errors. No functional change. I know "busses" is not an error, but "buses" was more common, so I used it consistently. Signed-off-by: Marta Rybczynska <rybczynska@gmail.com> (pci_reset_bridge_secondary_bus()) Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'include/linux/pci.h')
-rw-r--r--include/linux/pci.h55
1 files changed, 27 insertions, 28 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 835ec7bf6c05..1084a15175e0 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -32,7 +32,6 @@
32#include <linux/irqreturn.h> 32#include <linux/irqreturn.h>
33#include <uapi/linux/pci.h> 33#include <uapi/linux/pci.h>
34 34
35/* Include the ID list */
36#include <linux/pci_ids.h> 35#include <linux/pci_ids.h>
37 36
38/* 37/*
@@ -42,9 +41,10 @@
42 * 41 *
43 * 7:3 = slot 42 * 7:3 = slot
44 * 2:0 = function 43 * 2:0 = function
45 * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined uapi/linux/pci.h 44 *
45 * PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() are defined in uapi/linux/pci.h.
46 * In the interest of not exposing interfaces to user-space unnecessarily, 46 * In the interest of not exposing interfaces to user-space unnecessarily,
47 * the following kernel only defines are being added here. 47 * the following kernel-only defines are being added here.
48 */ 48 */
49#define PCI_DEVID(bus, devfn) ((((u16)bus) << 8) | devfn) 49#define PCI_DEVID(bus, devfn) ((((u16)bus) << 8) | devfn)
50/* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */ 50/* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */
@@ -153,10 +153,10 @@ enum pcie_reset_state {
153 /* Reset is NOT asserted (Use to deassert reset) */ 153 /* Reset is NOT asserted (Use to deassert reset) */
154 pcie_deassert_reset = (__force pcie_reset_state_t) 1, 154 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
155 155
156 /* Use #PERST to reset PCI-E device */ 156 /* Use #PERST to reset PCIe device */
157 pcie_warm_reset = (__force pcie_reset_state_t) 2, 157 pcie_warm_reset = (__force pcie_reset_state_t) 2,
158 158
159 /* Use PCI-E Hot Reset to reset device */ 159 /* Use PCIe Hot Reset to reset device */
160 pcie_hot_reset = (__force pcie_reset_state_t) 3 160 pcie_hot_reset = (__force pcie_reset_state_t) 3
161}; 161};
162 162
@@ -259,13 +259,13 @@ struct pci_dev {
259 unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 259 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
260 u8 revision; /* PCI revision, low byte of class word */ 260 u8 revision; /* PCI revision, low byte of class word */
261 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 261 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
262 u8 pcie_cap; /* PCI-E capability offset */ 262 u8 pcie_cap; /* PCIe capability offset */
263 u8 msi_cap; /* MSI capability offset */ 263 u8 msi_cap; /* MSI capability offset */
264 u8 msix_cap; /* MSI-X capability offset */ 264 u8 msix_cap; /* MSI-X capability offset */
265 u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */ 265 u8 pcie_mpss:3; /* PCIe Max Payload Size Supported */
266 u8 rom_base_reg; /* which config register controls the ROM */ 266 u8 rom_base_reg; /* which config register controls the ROM */
267 u8 pin; /* which interrupt pin this device uses */ 267 u8 pin; /* which interrupt pin this device uses */
268 u16 pcie_flags_reg; /* cached PCI-E Capabilities Register */ 268 u16 pcie_flags_reg; /* cached PCIe Capabilities Register */
269 269
270 struct pci_driver *driver; /* which driver has allocated this device */ 270 struct pci_driver *driver; /* which driver has allocated this device */
271 u64 dma_mask; /* Mask of the bits of bus address this 271 u64 dma_mask; /* Mask of the bits of bus address this
@@ -300,7 +300,7 @@ struct pci_dev {
300 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */ 300 unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
301 301
302#ifdef CONFIG_PCIEASPM 302#ifdef CONFIG_PCIEASPM
303 struct pcie_link_state *link_state; /* ASPM link state. */ 303 struct pcie_link_state *link_state; /* ASPM link state */
304#endif 304#endif
305 305
306 pci_channel_state_t error_state; /* current connectivity state */ 306 pci_channel_state_t error_state; /* current connectivity state */
@@ -317,7 +317,7 @@ struct pci_dev {
317 317
318 bool match_driver; /* Skip attaching driver */ 318 bool match_driver; /* Skip attaching driver */
319 /* These fields are used by common fixups */ 319 /* These fields are used by common fixups */
320 unsigned int transparent:1; /* Transparent PCI bridge */ 320 unsigned int transparent:1; /* Subtractive decode PCI bridge */
321 unsigned int multifunction:1;/* Part of multi-function device */ 321 unsigned int multifunction:1;/* Part of multi-function device */
322 /* keep track of device state */ 322 /* keep track of device state */
323 unsigned int is_added:1; 323 unsigned int is_added:1;
@@ -326,7 +326,7 @@ struct pci_dev {
326 unsigned int block_cfg_access:1; /* config space access is blocked */ 326 unsigned int block_cfg_access:1; /* config space access is blocked */
327 unsigned int broken_parity_status:1; /* Device generates false positive parity */ 327 unsigned int broken_parity_status:1; /* Device generates false positive parity */
328 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ 328 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
329 unsigned int msi_enabled:1; 329 unsigned int msi_enabled:1;
330 unsigned int msix_enabled:1; 330 unsigned int msix_enabled:1;
331 unsigned int ari_enabled:1; /* ARI forwarding */ 331 unsigned int ari_enabled:1; /* ARI forwarding */
332 unsigned int is_managed:1; 332 unsigned int is_managed:1;
@@ -371,7 +371,6 @@ static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
371 if (dev->is_virtfn) 371 if (dev->is_virtfn)
372 dev = dev->physfn; 372 dev = dev->physfn;
373#endif 373#endif
374
375 return dev; 374 return dev;
376} 375}
377 376
@@ -456,7 +455,7 @@ struct pci_bus {
456 char name[48]; 455 char name[48];
457 456
458 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ 457 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
459 pci_bus_flags_t bus_flags; /* Inherited by child busses */ 458 pci_bus_flags_t bus_flags; /* inherited by child buses */
460 struct device *bridge; 459 struct device *bridge;
461 struct device dev; 460 struct device dev;
462 struct bin_attribute *legacy_io; /* legacy I/O for this bus */ 461 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
@@ -468,7 +467,7 @@ struct pci_bus {
468#define to_pci_bus(n) container_of(n, struct pci_bus, dev) 467#define to_pci_bus(n) container_of(n, struct pci_bus, dev)
469 468
470/* 469/*
471 * Returns true if the pci bus is root (behind host-pci bridge), 470 * Returns true if the PCI bus is root (behind host-PCI bridge),
472 * false otherwise 471 * false otherwise
473 * 472 *
474 * Some code assumes that "bus->self == NULL" means that bus is a root bus. 473 * Some code assumes that "bus->self == NULL" means that bus is a root bus.
@@ -510,7 +509,7 @@ static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false;
510#define PCIBIOS_BUFFER_TOO_SMALL 0x89 509#define PCIBIOS_BUFFER_TOO_SMALL 0x89
511 510
512/* 511/*
513 * Translate above to generic errno for passing back through non-pci. 512 * Translate above to generic errno for passing back through non-PCI code.
514 */ 513 */
515static inline int pcibios_err_to_errno(int err) 514static inline int pcibios_err_to_errno(int err)
516{ 515{
@@ -561,11 +560,12 @@ struct pci_dynids {
561 struct list_head list; /* for IDs added at runtime */ 560 struct list_head list; /* for IDs added at runtime */
562}; 561};
563 562
564/* ---------------------------------------------------------------- */ 563
565/** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides 564/*
566 * a set of callbacks in struct pci_error_handlers, then that device driver 565 * PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
567 * will be notified of PCI bus errors, and will be driven to recovery 566 * a set of callbacks in struct pci_error_handlers, that device driver
568 * when an error occurs. 567 * will be notified of PCI bus errors, and will be driven to recovery
568 * when an error occurs.
569 */ 569 */
570 570
571typedef unsigned int __bitwise pci_ers_result_t; 571typedef unsigned int __bitwise pci_ers_result_t;
@@ -609,7 +609,6 @@ struct pci_error_handlers {
609 void (*resume)(struct pci_dev *dev); 609 void (*resume)(struct pci_dev *dev);
610}; 610};
611 611
612/* ---------------------------------------------------------------- */
613 612
614struct module; 613struct module;
615struct pci_driver { 614struct pci_driver {
@@ -713,10 +712,10 @@ extern enum pcie_bus_config_types pcie_bus_config;
713 712
714extern struct bus_type pci_bus_type; 713extern struct bus_type pci_bus_type;
715 714
716/* Do NOT directly access these two variables, unless you are arch specific pci 715/* Do NOT directly access these two variables, unless you are arch-specific PCI
717 * code, or pci core code. */ 716 * code, or PCI core code. */
718extern struct list_head pci_root_buses; /* list of all known PCI buses */ 717extern struct list_head pci_root_buses; /* list of all known PCI buses */
719/* Some device drivers need know if pci is initiated */ 718/* Some device drivers need know if PCI is initiated */
720int no_pci_devices(void); 719int no_pci_devices(void);
721 720
722void pcibios_resource_survey_bus(struct pci_bus *bus); 721void pcibios_resource_survey_bus(struct pci_bus *bus);
@@ -724,7 +723,7 @@ void pcibios_add_bus(struct pci_bus *bus);
724void pcibios_remove_bus(struct pci_bus *bus); 723void pcibios_remove_bus(struct pci_bus *bus);
725void pcibios_fixup_bus(struct pci_bus *); 724void pcibios_fixup_bus(struct pci_bus *);
726int __must_check pcibios_enable_device(struct pci_dev *, int mask); 725int __must_check pcibios_enable_device(struct pci_dev *, int mask);
727/* Architecture specific versions may override this (weak) */ 726/* Architecture-specific versions may override this (weak) */
728char *pcibios_setup(char *str); 727char *pcibios_setup(char *str);
729 728
730/* Used only when drivers/pci/setup.c is used */ 729/* Used only when drivers/pci/setup.c is used */
@@ -1258,7 +1257,7 @@ void pci_cfg_access_unlock(struct pci_dev *dev);
1258 1257
1259/* 1258/*
1260 * PCI domain support. Sometimes called PCI segment (eg by ACPI), 1259 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
1261 * a PCI domain is defined to be a set of PCI busses which share 1260 * a PCI domain is defined to be a set of PCI buses which share
1262 * configuration space. 1261 * configuration space.
1263 */ 1262 */
1264#ifdef CONFIG_PCI_DOMAINS 1263#ifdef CONFIG_PCI_DOMAINS
@@ -1672,7 +1671,7 @@ extern u8 pci_cache_line_size;
1672extern unsigned long pci_hotplug_io_size; 1671extern unsigned long pci_hotplug_io_size;
1673extern unsigned long pci_hotplug_mem_size; 1672extern unsigned long pci_hotplug_mem_size;
1674 1673
1675/* Architecture specific versions may override these (weak) */ 1674/* Architecture-specific versions may override these (weak) */
1676int pcibios_add_platform_entries(struct pci_dev *dev); 1675int pcibios_add_platform_entries(struct pci_dev *dev);
1677void pcibios_disable_device(struct pci_dev *dev); 1676void pcibios_disable_device(struct pci_dev *dev);
1678void pcibios_set_master(struct pci_dev *dev); 1677void pcibios_set_master(struct pci_dev *dev);