diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2006-09-28 09:38:36 -0400 |
---|---|---|
committer | Artem Bityutskiy <dedekind@infradead.org> | 2006-11-29 10:03:52 -0500 |
commit | 29072b96078ffde36f03d51e6b5d0cff1ba8c7df (patch) | |
tree | 1353a27ae7e594044c521e28abf558e3796f98c9 /include/linux/mtd | |
parent | f6a7ecb18dabd88bd9f28e7bece564cabe8ffe82 (diff) |
[MTD] NAND: add subpage write support
Many SLC NANDs support up to 4 writes at one NAND page. Add support
of this feature.
Signed-off-by: Artem Bityutskiy <dedekind@infradead.org>
Diffstat (limited to 'include/linux/mtd')
-rw-r--r-- | include/linux/mtd/mtd.h | 2 | ||||
-rw-r--r-- | include/linux/mtd/nand.h | 9 |
2 files changed, 11 insertions, 0 deletions
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index e34bbc98d4fe..18acb6d0033b 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h | |||
@@ -200,6 +200,8 @@ struct mtd_info { | |||
200 | 200 | ||
201 | /* ECC status information */ | 201 | /* ECC status information */ |
202 | struct mtd_ecc_stats ecc_stats; | 202 | struct mtd_ecc_stats ecc_stats; |
203 | /* Subpage shift (NAND) */ | ||
204 | int subpage_sft; | ||
203 | 205 | ||
204 | void *priv; | 206 | void *priv; |
205 | 207 | ||
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 6fc3e07497e0..1aeedf27a1ff 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h | |||
@@ -166,6 +166,9 @@ typedef enum { | |||
166 | * for all large page devices, as they do not support | 166 | * for all large page devices, as they do not support |
167 | * autoincrement.*/ | 167 | * autoincrement.*/ |
168 | #define NAND_NO_READRDY 0x00000100 | 168 | #define NAND_NO_READRDY 0x00000100 |
169 | /* Chip does not allow subpage writes */ | ||
170 | #define NAND_NO_SUBPAGE_WRITE 0x00000200 | ||
171 | |||
169 | 172 | ||
170 | /* Options valid for Samsung large page devices */ | 173 | /* Options valid for Samsung large page devices */ |
171 | #define NAND_SAMSUNG_LP_OPTIONS \ | 174 | #define NAND_SAMSUNG_LP_OPTIONS \ |
@@ -193,6 +196,9 @@ typedef enum { | |||
193 | /* Nand scan has allocated controller struct */ | 196 | /* Nand scan has allocated controller struct */ |
194 | #define NAND_CONTROLLER_ALLOC 0x80000000 | 197 | #define NAND_CONTROLLER_ALLOC 0x80000000 |
195 | 198 | ||
199 | /* Cell info constants */ | ||
200 | #define NAND_CI_CHIPNR_MSK 0x03 | ||
201 | #define NAND_CI_CELLTYPE_MSK 0x0C | ||
196 | 202 | ||
197 | /* | 203 | /* |
198 | * nand_state_t - chip states | 204 | * nand_state_t - chip states |
@@ -341,6 +347,7 @@ struct nand_buffers { | |||
341 | * @chipsize: [INTERN] the size of one chip for multichip arrays | 347 | * @chipsize: [INTERN] the size of one chip for multichip arrays |
342 | * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 | 348 | * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 |
343 | * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf | 349 | * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf |
350 | * @subpagesize: [INTERN] holds the subpagesize | ||
344 | * @ecclayout: [REPLACEABLE] the default ecc placement scheme | 351 | * @ecclayout: [REPLACEABLE] the default ecc placement scheme |
345 | * @bbt: [INTERN] bad block table pointer | 352 | * @bbt: [INTERN] bad block table pointer |
346 | * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup | 353 | * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup |
@@ -388,6 +395,8 @@ struct nand_chip { | |||
388 | unsigned long chipsize; | 395 | unsigned long chipsize; |
389 | int pagemask; | 396 | int pagemask; |
390 | int pagebuf; | 397 | int pagebuf; |
398 | int subpagesize; | ||
399 | uint8_t cellinfo; | ||
391 | int badblockpos; | 400 | int badblockpos; |
392 | 401 | ||
393 | nand_state_t state; | 402 | nand_state_t state; |